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Merge tag 'pull-monitor-2023-01-19' of https://repo.or.cz/qemu/armbru into staging
[qmiga/qemu.git] / target / tricore / cpu.c
1 /*
2  *  TriCore emulation for qemu: main translation routines.
3  *
4  *  Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
22 #include "cpu.h"
23 #include "exec/exec-all.h"
24 #include "qemu/error-report.h"
25
26 static inline void set_feature(CPUTriCoreState *env, int feature)
27 {
28     env->features |= 1ULL << feature;
29 }
30
31 static gchar *tricore_gdb_arch_name(CPUState *cs)
32 {
33     return g_strdup("tricore");
34 }
35
36 static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
37 {
38     TriCoreCPU *cpu = TRICORE_CPU(cs);
39     CPUTriCoreState *env = &cpu->env;
40
41     env->PC = value & ~(target_ulong)1;
42 }
43
44 static vaddr tricore_cpu_get_pc(CPUState *cs)
45 {
46     TriCoreCPU *cpu = TRICORE_CPU(cs);
47     CPUTriCoreState *env = &cpu->env;
48
49     return env->PC;
50 }
51
52 static void tricore_cpu_synchronize_from_tb(CPUState *cs,
53                                             const TranslationBlock *tb)
54 {
55     TriCoreCPU *cpu = TRICORE_CPU(cs);
56     CPUTriCoreState *env = &cpu->env;
57
58     env->PC = tb_pc(tb);
59 }
60
61 static void tricore_restore_state_to_opc(CPUState *cs,
62                                          const TranslationBlock *tb,
63                                          const uint64_t *data)
64 {
65     TriCoreCPU *cpu = TRICORE_CPU(cs);
66     CPUTriCoreState *env = &cpu->env;
67
68     env->PC = data[0];
69 }
70
71 static void tricore_cpu_reset_hold(Object *obj)
72 {
73     CPUState *s = CPU(obj);
74     TriCoreCPU *cpu = TRICORE_CPU(s);
75     TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu);
76     CPUTriCoreState *env = &cpu->env;
77
78     if (tcc->parent_phases.hold) {
79         tcc->parent_phases.hold(obj);
80     }
81
82     cpu_state_reset(env);
83 }
84
85 static bool tricore_cpu_has_work(CPUState *cs)
86 {
87     return true;
88 }
89
90 static void tricore_cpu_realizefn(DeviceState *dev, Error **errp)
91 {
92     CPUState *cs = CPU(dev);
93     TriCoreCPU *cpu = TRICORE_CPU(dev);
94     TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev);
95     CPUTriCoreState *env = &cpu->env;
96     Error *local_err = NULL;
97
98     cpu_exec_realizefn(cs, &local_err);
99     if (local_err != NULL) {
100         error_propagate(errp, local_err);
101         return;
102     }
103
104     /* Some features automatically imply others */
105     if (tricore_feature(env, TRICORE_FEATURE_161)) {
106         set_feature(env, TRICORE_FEATURE_16);
107     }
108
109     if (tricore_feature(env, TRICORE_FEATURE_16)) {
110         set_feature(env, TRICORE_FEATURE_131);
111     }
112     if (tricore_feature(env, TRICORE_FEATURE_131)) {
113         set_feature(env, TRICORE_FEATURE_13);
114     }
115     cpu_reset(cs);
116     qemu_init_vcpu(cs);
117
118     tcc->parent_realize(dev, errp);
119 }
120
121
122 static void tricore_cpu_initfn(Object *obj)
123 {
124     TriCoreCPU *cpu = TRICORE_CPU(obj);
125
126     cpu_set_cpustate_pointers(cpu);
127 }
128
129 static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
130 {
131     ObjectClass *oc;
132     char *typename;
133
134     typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
135     oc = object_class_by_name(typename);
136     g_free(typename);
137     if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
138         object_class_is_abstract(oc)) {
139         return NULL;
140     }
141     return oc;
142 }
143
144 static void tc1796_initfn(Object *obj)
145 {
146     TriCoreCPU *cpu = TRICORE_CPU(obj);
147
148     set_feature(&cpu->env, TRICORE_FEATURE_13);
149 }
150
151 static void tc1797_initfn(Object *obj)
152 {
153     TriCoreCPU *cpu = TRICORE_CPU(obj);
154
155     set_feature(&cpu->env, TRICORE_FEATURE_131);
156 }
157
158 static void tc27x_initfn(Object *obj)
159 {
160     TriCoreCPU *cpu = TRICORE_CPU(obj);
161
162     set_feature(&cpu->env, TRICORE_FEATURE_161);
163 }
164
165 #include "hw/core/sysemu-cpu-ops.h"
166
167 static const struct SysemuCPUOps tricore_sysemu_ops = {
168     .get_phys_page_debug = tricore_cpu_get_phys_page_debug,
169 };
170
171 #include "hw/core/tcg-cpu-ops.h"
172
173 static const struct TCGCPUOps tricore_tcg_ops = {
174     .initialize = tricore_tcg_init,
175     .synchronize_from_tb = tricore_cpu_synchronize_from_tb,
176     .restore_state_to_opc = tricore_restore_state_to_opc,
177     .tlb_fill = tricore_cpu_tlb_fill,
178 };
179
180 static void tricore_cpu_class_init(ObjectClass *c, void *data)
181 {
182     TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c);
183     CPUClass *cc = CPU_CLASS(c);
184     DeviceClass *dc = DEVICE_CLASS(c);
185     ResettableClass *rc = RESETTABLE_CLASS(c);
186
187     device_class_set_parent_realize(dc, tricore_cpu_realizefn,
188                                     &mcc->parent_realize);
189
190     resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL,
191                                        &mcc->parent_phases);
192     cc->class_by_name = tricore_cpu_class_by_name;
193     cc->has_work = tricore_cpu_has_work;
194
195     cc->gdb_read_register = tricore_cpu_gdb_read_register;
196     cc->gdb_write_register = tricore_cpu_gdb_write_register;
197     cc->gdb_num_core_regs = 44;
198     cc->gdb_arch_name = tricore_gdb_arch_name;
199
200     cc->dump_state = tricore_cpu_dump_state;
201     cc->set_pc = tricore_cpu_set_pc;
202     cc->get_pc = tricore_cpu_get_pc;
203     cc->sysemu_ops = &tricore_sysemu_ops;
204     cc->tcg_ops = &tricore_tcg_ops;
205 }
206
207 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
208     {                                              \
209         .parent = TYPE_TRICORE_CPU,                \
210         .instance_init = initfn,                   \
211         .name = TRICORE_CPU_TYPE_NAME(cpu_model),  \
212     }
213
214 static const TypeInfo tricore_cpu_type_infos[] = {
215     {
216         .name = TYPE_TRICORE_CPU,
217         .parent = TYPE_CPU,
218         .instance_size = sizeof(TriCoreCPU),
219         .instance_init = tricore_cpu_initfn,
220         .abstract = true,
221         .class_size = sizeof(TriCoreCPUClass),
222         .class_init = tricore_cpu_class_init,
223     },
224     DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn),
225     DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn),
226     DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn),
227 };
228
229 DEFINE_TYPES(tricore_cpu_type_infos)