1 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 -mattr=-sse4.1 < %s | FileCheck %s
3 ; Verify that we don't emit packed vector shifts instructions if the
4 ; condition used by the vector select is a vector of constants.
6 define <4 x float> @test1(<4 x float> %a, <4 x float> %b) {
9 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm1
10 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
11 ; CHECK-NEXT: orps %xmm1, %xmm0
13 %1 = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x float> %a, <4 x float> %b
17 define <4 x float> @test2(<4 x float> %a, <4 x float> %b) {
20 ; CHECK-NEXT: movsd %xmm0, %xmm1
21 ; CHECK-NEXT: movaps %xmm1, %xmm0
23 %1 = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x float> %a, <4 x float> %b
27 define <4 x float> @test3(<4 x float> %a, <4 x float> %b) {
30 ; CHECK-NEXT: movsd %xmm1, %xmm0
32 %1 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %a, <4 x float> %b
36 define <4 x float> @test4(<4 x float> %a, <4 x float> %b) {
39 ; CHECK-NEXT: movaps %xmm1, %xmm0
41 %1 = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>, <4 x float> %a, <4 x float> %b
45 define <4 x float> @test5(<4 x float> %a, <4 x float> %b) {
49 %1 = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %b
53 define <8 x i16> @test6(<8 x i16> %a, <8 x i16> %b) {
56 ; CHECK-NEXT: movaps {{.*#+}} xmm1 = [0,65535,0,65535,0,65535,0,65535]
57 ; CHECK-NEXT: andps %xmm0, %xmm1
58 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
59 ; CHECK-NEXT: orps %xmm1, %xmm0
61 %1 = select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>, <8 x i16> %a, <8 x i16> %a
65 define <8 x i16> @test7(<8 x i16> %a, <8 x i16> %b) {
68 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm1
69 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
70 ; CHECK-NEXT: orps %xmm1, %xmm0
72 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %a, <8 x i16> %b
76 define <8 x i16> @test8(<8 x i16> %a, <8 x i16> %b) {
79 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm1
80 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
81 ; CHECK-NEXT: orps %xmm1, %xmm0
83 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 false, i1 true, i1 true, i1 true, i1 true>, <8 x i16> %a, <8 x i16> %b
87 define <8 x i16> @test9(<8 x i16> %a, <8 x i16> %b) {
90 ; CHECK-NEXT: movaps %xmm1, %xmm0
92 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %a, <8 x i16> %b
96 define <8 x i16> @test10(<8 x i16> %a, <8 x i16> %b) {
97 ; CHECK-LABEL: test10:
100 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x i16> %a, <8 x i16> %b
104 define <8 x i16> @test11(<8 x i16> %a, <8 x i16> %b) {
105 ; CHECK-LABEL: test11:
107 ; CHECK-NEXT: movaps {{.*#+}} xmm2 = <0,65535,65535,0,u,65535,65535,u>
108 ; CHECK-NEXT: andps %xmm2, %xmm0
109 ; CHECK-NEXT: andnps %xmm1, %xmm2
110 ; CHECK-NEXT: orps %xmm2, %xmm0
112 %1 = select <8 x i1> <i1 false, i1 true, i1 true, i1 false, i1 undef, i1 true, i1 true, i1 undef>, <8 x i16> %a, <8 x i16> %b
116 define <8 x i16> @test12(<8 x i16> %a, <8 x i16> %b) {
117 ; CHECK-LABEL: test12:
119 ; CHECK-NEXT: movaps %xmm1, %xmm0
121 %1 = select <8 x i1> <i1 false, i1 false, i1 undef, i1 false, i1 false, i1 false, i1 false, i1 undef>, <8 x i16> %a, <8 x i16> %b
125 define <8 x i16> @test13(<8 x i16> %a, <8 x i16> %b) {
126 ; CHECK-LABEL: test13:
128 ; CHECK-NEXT: movaps %xmm1, %xmm0
130 %1 = select <8 x i1> <i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef>, <8 x i16> %a, <8 x i16> %b
134 ; Fold (vselect (build_vector AllOnes), N1, N2) -> N1
135 define <4 x float> @test14(<4 x float> %a, <4 x float> %b) {
136 ; CHECK-LABEL: test14:
139 %1 = select <4 x i1> <i1 true, i1 undef, i1 true, i1 undef>, <4 x float> %a, <4 x float> %b
143 define <8 x i16> @test15(<8 x i16> %a, <8 x i16> %b) {
144 ; CHECK-LABEL: test15:
147 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 undef, i1 undef, i1 true, i1 true, i1 undef>, <8 x i16> %a, <8 x i16> %b
151 ; Fold (vselect (build_vector AllZeros), N1, N2) -> N2
152 define <4 x float> @test16(<4 x float> %a, <4 x float> %b) {
153 ; CHECK-LABEL: test16:
155 ; CHECK-NEXT: movaps %xmm1, %xmm0
157 %1 = select <4 x i1> <i1 false, i1 undef, i1 false, i1 undef>, <4 x float> %a, <4 x float> %b
161 define <8 x i16> @test17(<8 x i16> %a, <8 x i16> %b) {
162 ; CHECK-LABEL: test17:
164 ; CHECK-NEXT: movaps %xmm1, %xmm0
166 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 undef, i1 undef, i1 false, i1 false, i1 undef>, <8 x i16> %a, <8 x i16> %b
170 define <4 x float> @test18(<4 x float> %a, <4 x float> %b) {
171 ; CHECK-LABEL: test18:
173 ; CHECK-NEXT: movss %xmm1, %xmm0
175 %1 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %b
179 define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) {
180 ; CHECK-LABEL: test19:
182 ; CHECK-NEXT: movss %xmm1, %xmm0
184 %1 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x i32> %a, <4 x i32> %b
188 define <2 x double> @test20(<2 x double> %a, <2 x double> %b) {
189 ; CHECK-LABEL: test20:
191 ; CHECK-NEXT: movsd %xmm1, %xmm0
193 %1 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %b
197 define <2 x i64> @test21(<2 x i64> %a, <2 x i64> %b) {
198 ; CHECK-LABEL: test21:
200 ; CHECK-NEXT: movsd %xmm1, %xmm0
202 %1 = select <2 x i1> <i1 false, i1 true>, <2 x i64> %a, <2 x i64> %b
206 define <4 x float> @test22(<4 x float> %a, <4 x float> %b) {
207 ; CHECK-LABEL: test22:
209 ; CHECK-NEXT: movss %xmm0, %xmm1
210 ; CHECK-NEXT: movaps %xmm1, %xmm0
212 %1 = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %a, <4 x float> %b
216 define <4 x i32> @test23(<4 x i32> %a, <4 x i32> %b) {
217 ; CHECK-LABEL: test23:
219 ; CHECK-NEXT: movss %xmm0, %xmm1
220 ; CHECK-NEXT: movaps %xmm1, %xmm0
222 %1 = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> %a, <4 x i32> %b
226 define <2 x double> @test24(<2 x double> %a, <2 x double> %b) {
227 ; CHECK-LABEL: test24:
229 ; CHECK-NEXT: movsd %xmm0, %xmm1
230 ; CHECK-NEXT: movaps %xmm1, %xmm0
232 %1 = select <2 x i1> <i1 true, i1 false>, <2 x double> %a, <2 x double> %b
236 define <2 x i64> @test25(<2 x i64> %a, <2 x i64> %b) {
237 ; CHECK-LABEL: test25:
239 ; CHECK-NEXT: movsd %xmm0, %xmm1
240 ; CHECK-NEXT: movaps %xmm1, %xmm0
242 %1 = select <2 x i1> <i1 true, i1 false>, <2 x i64> %a, <2 x i64> %b
246 define <4 x float> @select_of_shuffles_0(<2 x float> %a0, <2 x float> %b0, <2 x float> %a1, <2 x float> %b1) {
247 ; CHECK-LABEL: select_of_shuffles_0:
249 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
250 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm3[0]
251 ; CHECK-NEXT: subps %xmm1, %xmm0
253 %1 = shufflevector <2 x float> %a0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
254 %2 = shufflevector <2 x float> %a1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
255 %3 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %2, <4 x float> %1
256 %4 = shufflevector <2 x float> %b0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
257 %5 = shufflevector <2 x float> %b1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
258 %6 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %5, <4 x float> %4
259 %7 = fsub <4 x float> %3, %6
264 define <16 x double> @select_illegal(<16 x double> %a, <16 x double> %b) {
265 ; CHECK-LABEL: select_illegal:
267 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm4
268 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm5
269 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm6
270 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm7
271 ; CHECK-NEXT: movaps %xmm7, 112(%rdi)
272 ; CHECK-NEXT: movaps %xmm6, 96(%rdi)
273 ; CHECK-NEXT: movaps %xmm5, 80(%rdi)
274 ; CHECK-NEXT: movaps %xmm4, 64(%rdi)
275 ; CHECK-NEXT: movaps %xmm3, 48(%rdi)
276 ; CHECK-NEXT: movaps %xmm2, 32(%rdi)
277 ; CHECK-NEXT: movaps %xmm1, 16(%rdi)
278 ; CHECK-NEXT: movaps %xmm0, (%rdi)
280 %sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b
281 ret <16 x double> %sel