2 * Copyright 2014 Advanced Micro Devices, Inc.
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
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24 #ifndef _AMDGPU_TEST_H_
25 #define _AMDGPU_TEST_H_
28 #include "amdgpu_drm.h"
31 * Define max. number of card in system which we are able to handle
33 #define MAX_CARDS_SUPPORTED 4
35 /* Forward reference for array to keep "drm" handles */
36 extern int drm_amdgpu[MAX_CARDS_SUPPORTED];
38 /* Global variables */
39 extern int open_render_node;
41 /************************* Basic test suite ********************************/
44 * Define basic test suite to serve as the starting point for future testing
48 * Initialize basic test suite
50 int suite_basic_tests_init();
53 * Deinitialize basic test suite
55 int suite_basic_tests_clean();
58 * Tests in basic test suite
60 extern CU_TestInfo basic_tests[];
63 * Initialize bo test suite
65 int suite_bo_tests_init();
68 * Deinitialize bo test suite
70 int suite_bo_tests_clean();
73 * Tests in bo test suite
75 extern CU_TestInfo bo_tests[];
78 * Initialize cs test suite
80 int suite_cs_tests_init();
83 * Deinitialize cs test suite
85 int suite_cs_tests_clean();
88 * Tests in cs test suite
90 extern CU_TestInfo cs_tests[];
93 * Initialize vce test suite
95 int suite_vce_tests_init();
98 * Deinitialize vce test suite
100 int suite_vce_tests_clean();
103 * Tests in vce test suite
105 extern CU_TestInfo vce_tests[];
108 + * Initialize vcn test suite
110 int suite_vcn_tests_init();
113 + * Deinitialize vcn test suite
115 int suite_vcn_tests_clean();
118 + * Tests in vcn test suite
120 extern CU_TestInfo vcn_tests[];
123 * Initialize uvd enc test suite
125 int suite_uvd_enc_tests_init();
128 * Deinitialize uvd enc test suite
130 int suite_uvd_enc_tests_clean();
133 * Tests in uvd enc test suite
135 extern CU_TestInfo uvd_enc_tests[];
140 static inline amdgpu_bo_handle gpu_mem_alloc(
141 amdgpu_device_handle device_handle,
147 amdgpu_va_handle *va_handle)
149 struct amdgpu_bo_alloc_request req = {0};
150 amdgpu_bo_handle buf_handle;
153 CU_ASSERT_NOT_EQUAL(vmc_addr, NULL);
155 req.alloc_size = size;
156 req.phys_alignment = alignment;
157 req.preferred_heap = type;
160 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
161 CU_ASSERT_EQUAL(r, 0);
163 r = amdgpu_va_range_alloc(device_handle,
164 amdgpu_gpu_va_range_general,
165 size, alignment, 0, vmc_addr,
167 CU_ASSERT_EQUAL(r, 0);
169 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, AMDGPU_VA_OP_MAP);
170 CU_ASSERT_EQUAL(r, 0);
175 static inline int gpu_mem_free(amdgpu_bo_handle bo,
176 amdgpu_va_handle va_handle,
182 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP);
183 CU_ASSERT_EQUAL(r, 0);
185 r = amdgpu_va_range_free(va_handle);
186 CU_ASSERT_EQUAL(r, 0);
188 r = amdgpu_bo_free(bo);
189 CU_ASSERT_EQUAL(r, 0);
195 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
196 unsigned alignment, unsigned heap, uint64_t flags,
197 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
198 amdgpu_va_handle *va_handle)
200 struct amdgpu_bo_alloc_request request = {};
201 amdgpu_bo_handle buf_handle;
202 amdgpu_va_handle handle;
206 request.alloc_size = size;
207 request.phys_alignment = alignment;
208 request.preferred_heap = heap;
209 request.flags = flags;
211 r = amdgpu_bo_alloc(dev, &request, &buf_handle);
215 r = amdgpu_va_range_alloc(dev,
216 amdgpu_gpu_va_range_general,
217 size, alignment, 0, &vmc_addr,
222 r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_MAP);
226 r = amdgpu_bo_cpu_map(buf_handle, cpu);
231 *mc_address = vmc_addr;
237 amdgpu_bo_cpu_unmap(buf_handle);
240 amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP);
243 amdgpu_bo_free(buf_handle);
248 amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
249 uint64_t mc_addr, uint64_t size)
251 amdgpu_bo_cpu_unmap(bo);
252 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP);
253 amdgpu_va_range_free(va_handle);
261 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
262 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list)
264 amdgpu_bo_handle resources[] = {bo1, bo2};
266 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list);
269 #endif /* #ifdef _AMDGPU_TEST_H_ */