tests/amdgpu/vm_tests.c

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22 */
  23
  24 #ifdef HAVE_CONFIG_H
  25 #include "config.h"
  26 #endif
  27
  28 #include "CUnit/Basic.h"
  29
  30 #include "amdgpu_test.h"
  31 #include "amdgpu_drm.h"
  32 #include "amdgpu_internal.h"
  33
  34 static  amdgpu_device_handle device_handle;
  35 static  uint32_t  major_version;
  36 static  uint32_t  minor_version;
  37
  38
  39 static void amdgpu_vmid_reserve_test(void);
  40
  41 CU_BOOL suite_vm_tests_enable(void)
  42 {
  43     CU_BOOL enable = CU_TRUE;
  44
  45         if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
  46                                      &minor_version, &device_handle))
  47                 return CU_FALSE;
  48
  49         if (device_handle->info.family_id == AMDGPU_FAMILY_SI) {
  50                 printf("\n\nCurrently hangs the CP on this ASIC, VM suite disabled\n");
  51                 enable = CU_FALSE;
  52         }
  53
  54         if (amdgpu_device_deinitialize(device_handle))
  55                 return CU_FALSE;
  56
  57         return enable;
  58 }
  59
  60 int suite_vm_tests_init(void)
  61 {
  62         int r;
  63
  64         r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
  65                                    &minor_version, &device_handle);
  66
  67         if (r) {
  68                 if ((r == -EACCES) && (errno == EACCES))
  69                         printf("\n\nError:%s. "
  70                                 "Hint:Try to run this test program as root.",
  71                                 strerror(errno));
  72                 return CUE_SINIT_FAILED;
  73         }
  74
  75         return CUE_SUCCESS;
  76 }
  77
  78 int suite_vm_tests_clean(void)
  79 {
  80         int r = amdgpu_device_deinitialize(device_handle);
  81
  82         if (r == 0)
  83                 return CUE_SUCCESS;
  84         else
  85                 return CUE_SCLEAN_FAILED;
  86 }
  87
  88
  89 CU_TestInfo vm_tests[] = {
  90         { "resere vmid test",  amdgpu_vmid_reserve_test },
  91         CU_TEST_INFO_NULL,
  92 };
  93
  94 static void amdgpu_vmid_reserve_test(void)
  95 {
  96         amdgpu_context_handle context_handle;
  97         amdgpu_bo_handle ib_result_handle;
  98         void *ib_result_cpu;
  99         uint64_t ib_result_mc_address;
 100         struct amdgpu_cs_request ibs_request;
 101         struct amdgpu_cs_ib_info ib_info;
 102         struct amdgpu_cs_fence fence_status;
 103         uint32_t expired, flags;
 104         int i, r;
 105         amdgpu_bo_list_handle bo_list;
 106         amdgpu_va_handle va_handle;
 107         static uint32_t *ptr;
 108
 109         r = amdgpu_cs_ctx_create(device_handle, &context_handle);
 110         CU_ASSERT_EQUAL(r, 0);
 111
 112         flags = 0;
 113         r = amdgpu_vm_reserve_vmid(device_handle, flags);
 114         CU_ASSERT_EQUAL(r, 0);
 115
 116
 117         r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
 118                         AMDGPU_GEM_DOMAIN_GTT, 0,
 119                                                     &ib_result_handle, &ib_result_cpu,
 120                                                     &ib_result_mc_address, &va_handle);
 121         CU_ASSERT_EQUAL(r, 0);
 122
 123         r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL,
 124                                &bo_list);
 125         CU_ASSERT_EQUAL(r, 0);
 126
 127         ptr = ib_result_cpu;
 128
 129         for (i = 0; i < 16; ++i)
 130                 ptr[i] = 0xffff1000;
 131
 132         memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
 133         ib_info.ib_mc_address = ib_result_mc_address;
 134         ib_info.size = 16;
 135
 136         memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
 137         ibs_request.ip_type = AMDGPU_HW_IP_GFX;
 138         ibs_request.ring = 0;
 139         ibs_request.number_of_ibs = 1;
 140         ibs_request.ibs = &ib_info;
 141         ibs_request.resources = bo_list;
 142         ibs_request.fence_info.handle = NULL;
 143
 144         r = amdgpu_cs_submit(context_handle, 0,&ibs_request, 1);
 145         CU_ASSERT_EQUAL(r, 0);
 146
 147
 148         memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
 149         fence_status.context = context_handle;
 150         fence_status.ip_type = AMDGPU_HW_IP_GFX;
 151         fence_status.ip_instance = 0;
 152         fence_status.ring = 0;
 153         fence_status.fence = ibs_request.seq_no;
 154
 155         r = amdgpu_cs_query_fence_status(&fence_status,
 156                         AMDGPU_TIMEOUT_INFINITE,0, &expired);
 157         CU_ASSERT_EQUAL(r, 0);
 158
 159         r = amdgpu_bo_list_destroy(bo_list);
 160         CU_ASSERT_EQUAL(r, 0);
 161
 162         r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
 163                                      ib_result_mc_address, 4096);
 164         CU_ASSERT_EQUAL(r, 0);
 165
 166         flags = 0;
 167         r = amdgpu_vm_unreserve_vmid(device_handle, flags);
 168         CU_ASSERT_EQUAL(r, 0);
 169
 170
 171         r = amdgpu_cs_ctx_free(context_handle);
 172         CU_ASSERT_EQUAL(r, 0);
 173 }