1 ; Tests basics and corner cases of arm32 sandboxing, using -Om1 in the hope that
2 ; the output will remain stable. When packing bundles, we try to limit to a few
3 ; instructions with well known sizes and minimal use of registers and stack
4 ; slots in the lowering sequence.
6 ; REQUIRES: allow_dump, target_ARM32
7 ; RUN: %p2i -i %s --sandbox --filetype=asm --target=arm32 --assemble \
8 ; RUN: --disassemble --args -Om1 -allow-externally-defined-symbols \
9 ; RUN: -ffunction-sections | FileCheck %s
11 declare void @call_target()
12 declare void @call_target1(i32 %arg0)
13 declare void @call_target2(i32 %arg0, i32 %arg1)
14 declare void @call_target3(i32 %arg0, i32 %arg1, i32 %arg2)
15 @global_short = internal global [2 x i8] zeroinitializer
17 ; A direct call sequence uses the right mask and register-call sequence.
18 define internal void @test_direct_call() {
20 call void @call_target()
23 ; CHECK-LABEL: test_direct_call
25 ; CHECK-NEXT: bic sp, sp, {{.*}} ; 0xc0000000
26 ; CHECK: {{[0-9]*}}c: {{.*}} bl {{.*}} call_target
27 ; CHECK-NEXT: {{[0-9]*}}0:
29 ; An indirect call sequence uses the right mask and register-call sequence.
30 define internal void @test_indirect_call(i32 %target) {
32 %__1 = inttoptr i32 %target to void ()*
36 ; CHECK-LABEL: test_indirect_call
38 ; CHECK: bic sp, sp, {{.*}} ; 0xc0000000
39 ; CHECK-NOT: bic sp, sp, {{.*}} ; 0xc0000000
40 ; CHECK: ldr [[REG:r[0-9]+]], [sp,
42 ; CHECK: {{[0-9]+}}8: {{.*}} bic [[REG:r[0-9]+]], [[REG]], {{.*}} 0xc000000f
43 ; CHECK-NEXT: blx [[REG]]
44 ; CHECk-NEXT: {{[0-9]+}}0:
46 ; A return sequences uses the right pop / mask / jmp sequence.
47 define internal void @test_ret() {
51 ; CHECK-LABEL: test_ret
52 ; CHECK: 0: {{.*}} bic lr, lr, {{.*}} 0xc000000f
55 ; Bundle lock without padding.
56 define internal void @bundle_lock_without_padding() {
58 %addr_short = bitcast [2 x i8]* @global_short to i16*
59 store i16 0, i16* %addr_short, align 1
62 ; CHECK-LABEL: bundle_lock_without_padding
63 ; CHECK: 0: {{.*}} movw
67 ; CHECK-NEXT: bic [[REG:r[0-9]+]], {{.*}} 0xc0000000
68 ; CHECK-NEXT: strh {{.*}}, {{[[]}}[[REG]]
69 ; CHECK-NEXT: bic lr, lr, {{.*}} ; 0xc000000f
70 ; CHECK-NEXT: {{.*}} bx lr
72 ; Bundle lock with padding.
73 define internal void @bundle_lock_with_padding() {
75 call void @call_target()
77 store i16 0, i16* undef, align 1 ; 3 insts
78 store i16 0, i16* undef, align 1 ; 3 insts
79 store i16 0, i16* undef, align 1 ; 3 insts
85 ; CHECK-LABEL: bundle_lock_with_padding
86 ; CHECK: 48: {{.*}} pop
88 ; CHECK-NEXT: bic lr, {{.*}} 0xc000000f
89 ; CHECK-NEXT: {{.*}} bx lr
91 ; Bundle lock align_to_end without any padding.
92 define internal void @bundle_lock_align_to_end_padding_0() {
94 call void @call_target()
96 call void @call_target3(i32 1, i32 2, i32 3)
100 ; CHECK-LABEL: bundle_lock_align_to_end_padding_0
101 ; CHECK: c: {{.*}} bl {{.*}} call_target
105 ; CHECK-NEXT: {{[0-9]+}}c: {{.*}} bl {{.*}} call_target3
107 ; CHECK-NEXT: bic sp, {{.*}} 0xc0000000
109 ; CHECK: {{[0-9]+}}0: {{.*}} bic lr, lr, {{.*}} 0xc000000f
110 ; CHECK-NEXT: {{.*}} bx lr
112 ; Bundle lock align_to_end with one bunch of padding.
113 define internal void @bundle_lock_align_to_end_padding_1() {
115 call void @call_target()
117 call void @call_target2(i32 1, i32 2)
121 ; CHECK-LABEL: bundle_lock_align_to_end_padding_1
122 ; CHECK: {{[0-9]*}}c: {{.*}} bl {{.*}} call_target
126 ; CHECK-NEXT: bl {{.*}} call_target2
127 ; CHECK: {{[0-9]+}}0: {{.*}} bic lr, lr, {{.*}} 0xc000000f
128 ; CHECK-NEXT: {{.*}} bx lr
130 ; Bundle lock align_to_end with two bunches of padding.
131 define internal void @bundle_lock_align_to_end_padding_2() {
133 call void @call_target2(i32 1, i32 2)
137 ; CHECK-LABEL: bundle_lock_align_to_end_padding_2
142 ; CHECK-NEXT: bl {{.*}} call_target2