2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/kernel.h>
20 #include <linux/types.h>
34 #include "thread-stack.h"
36 #include "callchain.h"
44 #include "intel-pt-decoder/intel-pt-log.h"
45 #include "intel-pt-decoder/intel-pt-decoder.h"
46 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
47 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
49 #define MAX_TIMESTAMP (~0ULL)
52 struct auxtrace auxtrace;
53 struct auxtrace_queues queues;
54 struct auxtrace_heap heap;
56 struct perf_session *session;
57 struct machine *machine;
58 struct perf_evsel *switch_evsel;
59 struct thread *unknown_thread;
60 bool timeless_decoding;
69 int have_sched_switch;
75 struct perf_tsc_conversion tc;
76 bool cap_user_time_zero;
78 struct itrace_synth_opts synth_opts;
80 bool sample_instructions;
81 u64 instructions_sample_type;
82 u64 instructions_sample_period;
87 u64 branches_sample_type;
90 bool sample_transactions;
91 u64 transactions_sample_type;
94 bool synth_needs_swap;
103 unsigned max_non_turbo_ratio;
105 unsigned long num_events;
111 INTEL_PT_SS_NOT_TRACING,
114 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
115 INTEL_PT_SS_EXPECTING_SWITCH_IP,
118 struct intel_pt_queue {
120 unsigned int queue_nr;
121 struct auxtrace_buffer *buffer;
123 const struct intel_pt_state *state;
124 struct ip_callchain *chain;
125 struct branch_stack *last_branch;
126 struct branch_stack *last_branch_rb;
127 size_t last_branch_pos;
128 union perf_event *event_buf;
131 bool step_through_buffers;
132 bool use_buffer_pid_tid;
137 struct thread *thread;
147 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
148 unsigned char *buf, size_t len)
150 struct intel_pt_pkt packet;
153 char desc[INTEL_PT_PKT_DESC_MAX];
154 const char *color = PERF_COLOR_BLUE;
156 color_fprintf(stdout, color,
157 ". ... Intel Processor Trace data: size %zu bytes\n",
161 ret = intel_pt_get_packet(buf, len, &packet);
167 color_fprintf(stdout, color, " %08x: ", pos);
168 for (i = 0; i < pkt_len; i++)
169 color_fprintf(stdout, color, " %02x", buf[i]);
171 color_fprintf(stdout, color, " ");
173 ret = intel_pt_pkt_desc(&packet, desc,
174 INTEL_PT_PKT_DESC_MAX);
176 color_fprintf(stdout, color, " %s\n", desc);
178 color_fprintf(stdout, color, " Bad packet!\n");
186 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
190 intel_pt_dump(pt, buf, len);
193 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
194 struct auxtrace_buffer *b)
198 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
202 b->use_size = b->data + b->size - start;
207 static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
208 struct auxtrace_queue *queue,
209 struct auxtrace_buffer *buffer)
211 if (queue->cpu == -1 && buffer->cpu != -1)
212 ptq->cpu = buffer->cpu;
214 ptq->pid = buffer->pid;
215 ptq->tid = buffer->tid;
217 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
218 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
220 thread__zput(ptq->thread);
222 if (ptq->tid != -1) {
224 ptq->thread = machine__findnew_thread(ptq->pt->machine,
228 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
233 /* This function assumes data is processed sequentially only */
234 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
236 struct intel_pt_queue *ptq = data;
237 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
238 struct auxtrace_queue *queue;
245 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
247 buffer = auxtrace_buffer__next(queue, buffer);
250 auxtrace_buffer__drop_data(old_buffer);
255 ptq->buffer = buffer;
258 int fd = perf_data_file__fd(ptq->pt->session->file);
260 buffer->data = auxtrace_buffer__get_data(buffer, fd);
265 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
266 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
269 if (buffer->use_data) {
270 b->len = buffer->use_size;
271 b->buf = buffer->use_data;
273 b->len = buffer->size;
274 b->buf = buffer->data;
276 b->ref_timestamp = buffer->reference;
279 * If in snapshot mode and the buffer has no usable data, get next
280 * buffer and again check overlap against old_buffer.
282 if (ptq->pt->snapshot_mode && !b->len)
286 auxtrace_buffer__drop_data(old_buffer);
288 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
289 !buffer->consecutive)) {
290 b->consecutive = false;
291 b->trace_nr = buffer->buffer_nr + 1;
293 b->consecutive = true;
296 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
297 ptq->tid != buffer->tid))
298 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
300 if (ptq->step_through_buffers)
304 return intel_pt_get_trace(b, data);
309 struct intel_pt_cache_entry {
310 struct auxtrace_cache_entry entry;
313 enum intel_pt_insn_op op;
314 enum intel_pt_insn_branch branch;
319 static int intel_pt_config_div(const char *var, const char *value, void *data)
324 if (!strcmp(var, "intel-pt.cache-divisor")) {
325 val = strtol(value, NULL, 0);
326 if (val > 0 && val <= INT_MAX)
333 static int intel_pt_cache_divisor(void)
340 perf_config(intel_pt_config_div, &d);
348 static unsigned int intel_pt_cache_size(struct dso *dso,
349 struct machine *machine)
353 size = dso__data_size(dso, machine);
354 size /= intel_pt_cache_divisor();
357 if (size > (1 << 21))
359 return 32 - __builtin_clz(size);
362 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
363 struct machine *machine)
365 struct auxtrace_cache *c;
368 if (dso->auxtrace_cache)
369 return dso->auxtrace_cache;
371 bits = intel_pt_cache_size(dso, machine);
373 /* Ignoring cache creation failure */
374 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
376 dso->auxtrace_cache = c;
381 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
382 u64 offset, u64 insn_cnt, u64 byte_cnt,
383 struct intel_pt_insn *intel_pt_insn)
385 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
386 struct intel_pt_cache_entry *e;
392 e = auxtrace_cache__alloc_entry(c);
396 e->insn_cnt = insn_cnt;
397 e->byte_cnt = byte_cnt;
398 e->op = intel_pt_insn->op;
399 e->branch = intel_pt_insn->branch;
400 e->length = intel_pt_insn->length;
401 e->rel = intel_pt_insn->rel;
403 err = auxtrace_cache__add(c, offset, &e->entry);
405 auxtrace_cache__free_entry(c, e);
410 static struct intel_pt_cache_entry *
411 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
413 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
418 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
421 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
422 uint64_t *insn_cnt_ptr, uint64_t *ip,
423 uint64_t to_ip, uint64_t max_insn_cnt,
426 struct intel_pt_queue *ptq = data;
427 struct machine *machine = ptq->pt->machine;
428 struct thread *thread;
429 struct addr_location al;
430 unsigned char buf[1024];
435 u64 offset, start_offset, start_ip;
439 if (to_ip && *ip == to_ip)
442 bufsz = intel_pt_insn_max_size();
444 if (*ip >= ptq->pt->kernel_start)
445 cpumode = PERF_RECORD_MISC_KERNEL;
447 cpumode = PERF_RECORD_MISC_USER;
449 thread = ptq->thread;
451 if (cpumode != PERF_RECORD_MISC_KERNEL)
453 thread = ptq->pt->unknown_thread;
457 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
458 if (!al.map || !al.map->dso)
461 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
462 dso__data_status_seen(al.map->dso,
463 DSO_DATA_STATUS_SEEN_ITRACE))
466 offset = al.map->map_ip(al.map, *ip);
468 if (!to_ip && one_map) {
469 struct intel_pt_cache_entry *e;
471 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
473 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
474 *insn_cnt_ptr = e->insn_cnt;
476 intel_pt_insn->op = e->op;
477 intel_pt_insn->branch = e->branch;
478 intel_pt_insn->length = e->length;
479 intel_pt_insn->rel = e->rel;
480 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
485 start_offset = offset;
488 /* Load maps to ensure dso->is_64_bit has been updated */
491 x86_64 = al.map->dso->is_64_bit;
494 len = dso__data_read_offset(al.map->dso, machine,
499 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
502 intel_pt_log_insn(intel_pt_insn, *ip);
506 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
509 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
512 *ip += intel_pt_insn->length;
514 if (to_ip && *ip == to_ip)
517 if (*ip >= al.map->end)
520 offset += intel_pt_insn->length;
525 *insn_cnt_ptr = insn_cnt;
531 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
535 struct intel_pt_cache_entry *e;
537 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
542 /* Ignore cache errors */
543 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
544 *ip - start_ip, intel_pt_insn);
549 *insn_cnt_ptr = insn_cnt;
553 static bool intel_pt_get_config(struct intel_pt *pt,
554 struct perf_event_attr *attr, u64 *config)
556 if (attr->type == pt->pmu_type) {
558 *config = attr->config;
565 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
567 struct perf_evsel *evsel;
569 evlist__for_each_entry(pt->session->evlist, evsel) {
570 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
571 !evsel->attr.exclude_kernel)
577 static bool intel_pt_return_compression(struct intel_pt *pt)
579 struct perf_evsel *evsel;
582 if (!pt->noretcomp_bit)
585 evlist__for_each_entry(pt->session->evlist, evsel) {
586 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
587 (config & pt->noretcomp_bit))
593 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
595 struct perf_evsel *evsel;
599 if (!pt->mtc_freq_bits)
602 for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
605 evlist__for_each_entry(pt->session->evlist, evsel) {
606 if (intel_pt_get_config(pt, &evsel->attr, &config))
607 return (config & pt->mtc_freq_bits) >> shift;
612 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
614 struct perf_evsel *evsel;
615 bool timeless_decoding = true;
618 if (!pt->tsc_bit || !pt->cap_user_time_zero)
621 evlist__for_each_entry(pt->session->evlist, evsel) {
622 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
624 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
625 if (config & pt->tsc_bit)
626 timeless_decoding = false;
631 return timeless_decoding;
634 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
636 struct perf_evsel *evsel;
638 evlist__for_each_entry(pt->session->evlist, evsel) {
639 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
640 !evsel->attr.exclude_kernel)
646 static bool intel_pt_have_tsc(struct intel_pt *pt)
648 struct perf_evsel *evsel;
649 bool have_tsc = false;
655 evlist__for_each_entry(pt->session->evlist, evsel) {
656 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
657 if (config & pt->tsc_bit)
666 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
670 quot = ns / pt->tc.time_mult;
671 rem = ns % pt->tc.time_mult;
672 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
676 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
677 unsigned int queue_nr)
679 struct intel_pt_params params = { .get_trace = 0, };
680 struct intel_pt_queue *ptq;
682 ptq = zalloc(sizeof(struct intel_pt_queue));
686 if (pt->synth_opts.callchain) {
687 size_t sz = sizeof(struct ip_callchain);
689 sz += pt->synth_opts.callchain_sz * sizeof(u64);
690 ptq->chain = zalloc(sz);
695 if (pt->synth_opts.last_branch) {
696 size_t sz = sizeof(struct branch_stack);
698 sz += pt->synth_opts.last_branch_sz *
699 sizeof(struct branch_entry);
700 ptq->last_branch = zalloc(sz);
701 if (!ptq->last_branch)
703 ptq->last_branch_rb = zalloc(sz);
704 if (!ptq->last_branch_rb)
708 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
713 ptq->queue_nr = queue_nr;
714 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
720 params.get_trace = intel_pt_get_trace;
721 params.walk_insn = intel_pt_walk_next_insn;
723 params.return_compression = intel_pt_return_compression(pt);
724 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
725 params.mtc_period = intel_pt_mtc_period(pt);
726 params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
727 params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
729 if (pt->synth_opts.instructions) {
730 if (pt->synth_opts.period) {
731 switch (pt->synth_opts.period_type) {
732 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
734 INTEL_PT_PERIOD_INSTRUCTIONS;
735 params.period = pt->synth_opts.period;
737 case PERF_ITRACE_PERIOD_TICKS:
738 params.period_type = INTEL_PT_PERIOD_TICKS;
739 params.period = pt->synth_opts.period;
741 case PERF_ITRACE_PERIOD_NANOSECS:
742 params.period_type = INTEL_PT_PERIOD_TICKS;
743 params.period = intel_pt_ns_to_ticks(pt,
744 pt->synth_opts.period);
751 if (!params.period) {
752 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
757 ptq->decoder = intel_pt_decoder_new(¶ms);
764 zfree(&ptq->event_buf);
765 zfree(&ptq->last_branch);
766 zfree(&ptq->last_branch_rb);
772 static void intel_pt_free_queue(void *priv)
774 struct intel_pt_queue *ptq = priv;
778 thread__zput(ptq->thread);
779 intel_pt_decoder_free(ptq->decoder);
780 zfree(&ptq->event_buf);
781 zfree(&ptq->last_branch);
782 zfree(&ptq->last_branch_rb);
787 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
788 struct auxtrace_queue *queue)
790 struct intel_pt_queue *ptq = queue->priv;
792 if (queue->tid == -1 || pt->have_sched_switch) {
793 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
794 thread__zput(ptq->thread);
797 if (!ptq->thread && ptq->tid != -1)
798 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
801 ptq->pid = ptq->thread->pid_;
802 if (queue->cpu == -1)
803 ptq->cpu = ptq->thread->cpu;
807 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
809 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
810 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
811 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
812 if (ptq->state->to_ip)
813 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
815 PERF_IP_FLAG_INTERRUPT;
817 ptq->flags = PERF_IP_FLAG_BRANCH |
818 PERF_IP_FLAG_TRACE_END;
821 if (ptq->state->from_ip)
822 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
824 ptq->flags = PERF_IP_FLAG_BRANCH |
825 PERF_IP_FLAG_TRACE_BEGIN;
826 if (ptq->state->flags & INTEL_PT_IN_TX)
827 ptq->flags |= PERF_IP_FLAG_IN_TX;
828 ptq->insn_len = ptq->state->insn_len;
832 static int intel_pt_setup_queue(struct intel_pt *pt,
833 struct auxtrace_queue *queue,
834 unsigned int queue_nr)
836 struct intel_pt_queue *ptq = queue->priv;
838 if (list_empty(&queue->head))
842 ptq = intel_pt_alloc_queue(pt, queue_nr);
847 if (queue->cpu != -1)
848 ptq->cpu = queue->cpu;
849 ptq->tid = queue->tid;
851 if (pt->sampling_mode) {
852 if (pt->timeless_decoding)
853 ptq->step_through_buffers = true;
854 if (pt->timeless_decoding || !pt->have_sched_switch)
855 ptq->use_buffer_pid_tid = true;
861 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
862 const struct intel_pt_state *state;
865 if (pt->timeless_decoding)
868 intel_pt_log("queue %u getting timestamp\n", queue_nr);
869 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
870 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
872 state = intel_pt_decode(ptq->decoder);
874 if (state->err == INTEL_PT_ERR_NODATA) {
875 intel_pt_log("queue %u has no timestamp\n",
881 if (state->timestamp)
885 ptq->timestamp = state->timestamp;
886 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
887 queue_nr, ptq->timestamp);
889 ptq->have_sample = true;
890 intel_pt_sample_flags(ptq);
891 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
900 static int intel_pt_setup_queues(struct intel_pt *pt)
905 for (i = 0; i < pt->queues.nr_queues; i++) {
906 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
913 static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
915 struct branch_stack *bs_src = ptq->last_branch_rb;
916 struct branch_stack *bs_dst = ptq->last_branch;
919 bs_dst->nr = bs_src->nr;
924 nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
925 memcpy(&bs_dst->entries[0],
926 &bs_src->entries[ptq->last_branch_pos],
927 sizeof(struct branch_entry) * nr);
929 if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
930 memcpy(&bs_dst->entries[nr],
932 sizeof(struct branch_entry) * ptq->last_branch_pos);
936 static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
938 ptq->last_branch_pos = 0;
939 ptq->last_branch_rb->nr = 0;
942 static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
944 const struct intel_pt_state *state = ptq->state;
945 struct branch_stack *bs = ptq->last_branch_rb;
946 struct branch_entry *be;
948 if (!ptq->last_branch_pos)
949 ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
951 ptq->last_branch_pos -= 1;
953 be = &bs->entries[ptq->last_branch_pos];
954 be->from = state->from_ip;
955 be->to = state->to_ip;
956 be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
957 be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
958 /* No support for mispredict */
959 be->flags.mispred = ptq->pt->mispred_all;
961 if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
965 static int intel_pt_inject_event(union perf_event *event,
966 struct perf_sample *sample, u64 type,
969 event->header.size = perf_event__sample_event_size(sample, type, 0);
970 return perf_event__synthesize_sample(event, type, 0, sample, swapped);
973 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
976 struct intel_pt *pt = ptq->pt;
977 union perf_event *event = ptq->event_buf;
978 struct perf_sample sample = { .ip = 0, };
979 struct dummy_branch_stack {
981 struct branch_entry entries;
984 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
987 if (pt->synth_opts.initial_skip &&
988 pt->num_events++ < pt->synth_opts.initial_skip)
991 event->sample.header.type = PERF_RECORD_SAMPLE;
992 event->sample.header.misc = PERF_RECORD_MISC_USER;
993 event->sample.header.size = sizeof(struct perf_event_header);
995 if (!pt->timeless_decoding)
996 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
998 sample.cpumode = PERF_RECORD_MISC_USER;
999 sample.ip = ptq->state->from_ip;
1000 sample.pid = ptq->pid;
1001 sample.tid = ptq->tid;
1002 sample.addr = ptq->state->to_ip;
1003 sample.id = ptq->pt->branches_id;
1004 sample.stream_id = ptq->pt->branches_id;
1006 sample.cpu = ptq->cpu;
1007 sample.flags = ptq->flags;
1008 sample.insn_len = ptq->insn_len;
1011 * perf report cannot handle events without a branch stack when using
1012 * SORT_MODE__BRANCH so make a dummy one.
1014 if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1015 dummy_bs = (struct dummy_branch_stack){
1022 sample.branch_stack = (struct branch_stack *)&dummy_bs;
1025 if (pt->synth_opts.inject) {
1026 ret = intel_pt_inject_event(event, &sample,
1027 pt->branches_sample_type,
1028 pt->synth_needs_swap);
1033 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1035 pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
1041 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1044 struct intel_pt *pt = ptq->pt;
1045 union perf_event *event = ptq->event_buf;
1046 struct perf_sample sample = { .ip = 0, };
1048 if (pt->synth_opts.initial_skip &&
1049 pt->num_events++ < pt->synth_opts.initial_skip)
1052 event->sample.header.type = PERF_RECORD_SAMPLE;
1053 event->sample.header.misc = PERF_RECORD_MISC_USER;
1054 event->sample.header.size = sizeof(struct perf_event_header);
1056 if (!pt->timeless_decoding)
1057 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1059 sample.cpumode = PERF_RECORD_MISC_USER;
1060 sample.ip = ptq->state->from_ip;
1061 sample.pid = ptq->pid;
1062 sample.tid = ptq->tid;
1063 sample.addr = ptq->state->to_ip;
1064 sample.id = ptq->pt->instructions_id;
1065 sample.stream_id = ptq->pt->instructions_id;
1066 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1067 sample.cpu = ptq->cpu;
1068 sample.flags = ptq->flags;
1069 sample.insn_len = ptq->insn_len;
1071 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1073 if (pt->synth_opts.callchain) {
1074 thread_stack__sample(ptq->thread, ptq->chain,
1075 pt->synth_opts.callchain_sz, sample.ip);
1076 sample.callchain = ptq->chain;
1079 if (pt->synth_opts.last_branch) {
1080 intel_pt_copy_last_branch_rb(ptq);
1081 sample.branch_stack = ptq->last_branch;
1084 if (pt->synth_opts.inject) {
1085 ret = intel_pt_inject_event(event, &sample,
1086 pt->instructions_sample_type,
1087 pt->synth_needs_swap);
1092 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1094 pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
1097 if (pt->synth_opts.last_branch)
1098 intel_pt_reset_last_branch_rb(ptq);
1103 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1106 struct intel_pt *pt = ptq->pt;
1107 union perf_event *event = ptq->event_buf;
1108 struct perf_sample sample = { .ip = 0, };
1110 if (pt->synth_opts.initial_skip &&
1111 pt->num_events++ < pt->synth_opts.initial_skip)
1114 event->sample.header.type = PERF_RECORD_SAMPLE;
1115 event->sample.header.misc = PERF_RECORD_MISC_USER;
1116 event->sample.header.size = sizeof(struct perf_event_header);
1118 if (!pt->timeless_decoding)
1119 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1121 sample.cpumode = PERF_RECORD_MISC_USER;
1122 sample.ip = ptq->state->from_ip;
1123 sample.pid = ptq->pid;
1124 sample.tid = ptq->tid;
1125 sample.addr = ptq->state->to_ip;
1126 sample.id = ptq->pt->transactions_id;
1127 sample.stream_id = ptq->pt->transactions_id;
1129 sample.cpu = ptq->cpu;
1130 sample.flags = ptq->flags;
1131 sample.insn_len = ptq->insn_len;
1133 if (pt->synth_opts.callchain) {
1134 thread_stack__sample(ptq->thread, ptq->chain,
1135 pt->synth_opts.callchain_sz, sample.ip);
1136 sample.callchain = ptq->chain;
1139 if (pt->synth_opts.last_branch) {
1140 intel_pt_copy_last_branch_rb(ptq);
1141 sample.branch_stack = ptq->last_branch;
1144 if (pt->synth_opts.inject) {
1145 ret = intel_pt_inject_event(event, &sample,
1146 pt->transactions_sample_type,
1147 pt->synth_needs_swap);
1152 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1154 pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
1157 if (pt->synth_opts.last_branch)
1158 intel_pt_reset_last_branch_rb(ptq);
1163 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1164 pid_t pid, pid_t tid, u64 ip)
1166 union perf_event event;
1167 char msg[MAX_AUXTRACE_ERROR_MSG];
1170 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1172 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1173 code, cpu, pid, tid, ip, msg);
1175 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1177 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1183 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1185 struct auxtrace_queue *queue;
1186 pid_t tid = ptq->next_tid;
1192 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1194 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1196 queue = &pt->queues.queue_array[ptq->queue_nr];
1197 intel_pt_set_pid_tid_cpu(pt, queue);
1204 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1206 struct intel_pt *pt = ptq->pt;
1208 return ip == pt->switch_ip &&
1209 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1210 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1211 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1214 static int intel_pt_sample(struct intel_pt_queue *ptq)
1216 const struct intel_pt_state *state = ptq->state;
1217 struct intel_pt *pt = ptq->pt;
1220 if (!ptq->have_sample)
1223 ptq->have_sample = false;
1225 if (pt->sample_instructions &&
1226 (state->type & INTEL_PT_INSTRUCTION) &&
1227 (!pt->synth_opts.initial_skip ||
1228 pt->num_events++ >= pt->synth_opts.initial_skip)) {
1229 err = intel_pt_synth_instruction_sample(ptq);
1234 if (pt->sample_transactions &&
1235 (state->type & INTEL_PT_TRANSACTION) &&
1236 (!pt->synth_opts.initial_skip ||
1237 pt->num_events++ >= pt->synth_opts.initial_skip)) {
1238 err = intel_pt_synth_transaction_sample(ptq);
1243 if (!(state->type & INTEL_PT_BRANCH))
1246 if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
1247 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1248 state->to_ip, ptq->insn_len,
1251 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1253 if (pt->sample_branches) {
1254 err = intel_pt_synth_branch_sample(ptq);
1259 if (pt->synth_opts.last_branch)
1260 intel_pt_update_last_branch_rb(ptq);
1262 if (!pt->sync_switch)
1265 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1266 switch (ptq->switch_state) {
1267 case INTEL_PT_SS_UNKNOWN:
1268 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1269 err = intel_pt_next_tid(pt, ptq);
1272 ptq->switch_state = INTEL_PT_SS_TRACING;
1275 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1278 } else if (!state->to_ip) {
1279 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1280 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1281 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1282 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1283 state->to_ip == pt->ptss_ip &&
1284 (ptq->flags & PERF_IP_FLAG_CALL)) {
1285 ptq->switch_state = INTEL_PT_SS_TRACING;
1291 static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
1293 struct machine *machine = pt->machine;
1295 struct symbol *sym, *start;
1296 u64 ip, switch_ip = 0;
1302 map = machine__kernel_map(machine);
1309 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1311 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1312 if (sym->binding == STB_GLOBAL &&
1313 !strcmp(sym->name, "__switch_to")) {
1314 ip = map->unmap_ip(map, sym->start);
1315 if (ip >= map->start && ip < map->end) {
1322 if (!switch_ip || !ptss_ip)
1325 if (pt->have_sched_switch == 1)
1326 ptss = "perf_trace_sched_switch";
1328 ptss = "__perf_event_task_sched_out";
1330 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1331 if (!strcmp(sym->name, ptss)) {
1332 ip = map->unmap_ip(map, sym->start);
1333 if (ip >= map->start && ip < map->end) {
1343 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1345 const struct intel_pt_state *state = ptq->state;
1346 struct intel_pt *pt = ptq->pt;
1349 if (!pt->kernel_start) {
1350 pt->kernel_start = machine__kernel_start(pt->machine);
1351 if (pt->per_cpu_mmaps &&
1352 (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
1353 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1354 !pt->sampling_mode) {
1355 pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
1356 if (pt->switch_ip) {
1357 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1358 pt->switch_ip, pt->ptss_ip);
1359 pt->sync_switch = true;
1364 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1365 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1367 err = intel_pt_sample(ptq);
1371 state = intel_pt_decode(ptq->decoder);
1373 if (state->err == INTEL_PT_ERR_NODATA)
1375 if (pt->sync_switch &&
1376 state->from_ip >= pt->kernel_start) {
1377 pt->sync_switch = false;
1378 intel_pt_next_tid(pt, ptq);
1380 if (pt->synth_opts.errors) {
1381 err = intel_pt_synth_error(pt, state->err,
1392 ptq->have_sample = true;
1393 intel_pt_sample_flags(ptq);
1395 /* Use estimated TSC upon return to user space */
1397 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1398 state->to_ip && state->to_ip < pt->kernel_start) {
1399 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1400 state->timestamp, state->est_timestamp);
1401 ptq->timestamp = state->est_timestamp;
1402 /* Use estimated TSC in unknown switch state */
1403 } else if (pt->sync_switch &&
1404 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1405 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1406 ptq->next_tid == -1) {
1407 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1408 state->timestamp, state->est_timestamp);
1409 ptq->timestamp = state->est_timestamp;
1410 } else if (state->timestamp > ptq->timestamp) {
1411 ptq->timestamp = state->timestamp;
1414 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1415 *timestamp = ptq->timestamp;
1422 static inline int intel_pt_update_queues(struct intel_pt *pt)
1424 if (pt->queues.new_data) {
1425 pt->queues.new_data = false;
1426 return intel_pt_setup_queues(pt);
1431 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1433 unsigned int queue_nr;
1438 struct auxtrace_queue *queue;
1439 struct intel_pt_queue *ptq;
1441 if (!pt->heap.heap_cnt)
1444 if (pt->heap.heap_array[0].ordinal >= timestamp)
1447 queue_nr = pt->heap.heap_array[0].queue_nr;
1448 queue = &pt->queues.queue_array[queue_nr];
1451 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1452 queue_nr, pt->heap.heap_array[0].ordinal,
1455 auxtrace_heap__pop(&pt->heap);
1457 if (pt->heap.heap_cnt) {
1458 ts = pt->heap.heap_array[0].ordinal + 1;
1465 intel_pt_set_pid_tid_cpu(pt, queue);
1467 ret = intel_pt_run_decoder(ptq, &ts);
1470 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1475 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1479 ptq->on_heap = false;
1486 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1489 struct auxtrace_queues *queues = &pt->queues;
1493 for (i = 0; i < queues->nr_queues; i++) {
1494 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1495 struct intel_pt_queue *ptq = queue->priv;
1497 if (ptq && (tid == -1 || ptq->tid == tid)) {
1499 intel_pt_set_pid_tid_cpu(pt, queue);
1500 intel_pt_run_decoder(ptq, &ts);
1506 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1508 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1509 sample->pid, sample->tid, 0);
1512 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1516 if (cpu < 0 || !pt->queues.nr_queues)
1519 if ((unsigned)cpu >= pt->queues.nr_queues)
1520 i = pt->queues.nr_queues - 1;
1524 if (pt->queues.queue_array[i].cpu == cpu)
1525 return pt->queues.queue_array[i].priv;
1527 for (j = 0; i > 0; j++) {
1528 if (pt->queues.queue_array[--i].cpu == cpu)
1529 return pt->queues.queue_array[i].priv;
1532 for (; j < pt->queues.nr_queues; j++) {
1533 if (pt->queues.queue_array[j].cpu == cpu)
1534 return pt->queues.queue_array[j].priv;
1540 static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
1543 struct intel_pt_queue *ptq;
1546 if (!pt->sync_switch)
1549 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1553 switch (ptq->switch_state) {
1554 case INTEL_PT_SS_NOT_TRACING:
1557 case INTEL_PT_SS_UNKNOWN:
1558 case INTEL_PT_SS_TRACING:
1559 ptq->next_tid = tid;
1560 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1562 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1563 if (!ptq->on_heap) {
1564 ptq->timestamp = perf_time_to_tsc(timestamp,
1566 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1570 ptq->on_heap = true;
1572 ptq->switch_state = INTEL_PT_SS_TRACING;
1574 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1575 ptq->next_tid = tid;
1576 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1585 static int intel_pt_process_switch(struct intel_pt *pt,
1586 struct perf_sample *sample)
1588 struct perf_evsel *evsel;
1592 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1593 if (evsel != pt->switch_evsel)
1596 tid = perf_evsel__intval(evsel, sample, "next_pid");
1599 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1600 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1603 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1607 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1610 static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
1611 struct perf_sample *sample)
1613 bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
1619 if (pt->have_sched_switch == 3) {
1622 if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
1623 pr_err("Expecting CPU-wide context switch event\n");
1626 pid = event->context_switch.next_prev_pid;
1627 tid = event->context_switch.next_prev_tid;
1636 pr_err("context_switch event has no tid\n");
1640 intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1641 cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
1644 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1648 return machine__set_current_tid(pt->machine, cpu, pid, tid);
1651 static int intel_pt_process_itrace_start(struct intel_pt *pt,
1652 union perf_event *event,
1653 struct perf_sample *sample)
1655 if (!pt->per_cpu_mmaps)
1658 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1659 sample->cpu, event->itrace_start.pid,
1660 event->itrace_start.tid, sample->time,
1661 perf_time_to_tsc(sample->time, &pt->tc));
1663 return machine__set_current_tid(pt->machine, sample->cpu,
1664 event->itrace_start.pid,
1665 event->itrace_start.tid);
1668 static int intel_pt_process_event(struct perf_session *session,
1669 union perf_event *event,
1670 struct perf_sample *sample,
1671 struct perf_tool *tool)
1673 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1681 if (!tool->ordered_events) {
1682 pr_err("Intel Processor Trace requires ordered events\n");
1686 if (sample->time && sample->time != (u64)-1)
1687 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1691 if (timestamp || pt->timeless_decoding) {
1692 err = intel_pt_update_queues(pt);
1697 if (pt->timeless_decoding) {
1698 if (event->header.type == PERF_RECORD_EXIT) {
1699 err = intel_pt_process_timeless_queues(pt,
1703 } else if (timestamp) {
1704 err = intel_pt_process_queues(pt, timestamp);
1709 if (event->header.type == PERF_RECORD_AUX &&
1710 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
1711 pt->synth_opts.errors) {
1712 err = intel_pt_lost(pt, sample);
1717 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
1718 err = intel_pt_process_switch(pt, sample);
1719 else if (event->header.type == PERF_RECORD_ITRACE_START)
1720 err = intel_pt_process_itrace_start(pt, event, sample);
1721 else if (event->header.type == PERF_RECORD_SWITCH ||
1722 event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
1723 err = intel_pt_context_switch(pt, event, sample);
1725 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
1726 perf_event__name(event->header.type), event->header.type,
1727 sample->cpu, sample->time, timestamp);
1732 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
1734 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1741 if (!tool->ordered_events)
1744 ret = intel_pt_update_queues(pt);
1748 if (pt->timeless_decoding)
1749 return intel_pt_process_timeless_queues(pt, -1,
1752 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
1755 static void intel_pt_free_events(struct perf_session *session)
1757 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1759 struct auxtrace_queues *queues = &pt->queues;
1762 for (i = 0; i < queues->nr_queues; i++) {
1763 intel_pt_free_queue(queues->queue_array[i].priv);
1764 queues->queue_array[i].priv = NULL;
1766 intel_pt_log_disable();
1767 auxtrace_queues__free(queues);
1770 static void intel_pt_free(struct perf_session *session)
1772 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1775 auxtrace_heap__free(&pt->heap);
1776 intel_pt_free_events(session);
1777 session->auxtrace = NULL;
1778 thread__put(pt->unknown_thread);
1783 static int intel_pt_process_auxtrace_event(struct perf_session *session,
1784 union perf_event *event,
1785 struct perf_tool *tool __maybe_unused)
1787 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1790 if (pt->sampling_mode)
1793 if (!pt->data_queued) {
1794 struct auxtrace_buffer *buffer;
1796 int fd = perf_data_file__fd(session->file);
1799 if (perf_data_file__is_pipe(session->file)) {
1802 data_offset = lseek(fd, 0, SEEK_CUR);
1803 if (data_offset == -1)
1807 err = auxtrace_queues__add_event(&pt->queues, session, event,
1808 data_offset, &buffer);
1812 /* Dump here now we have copied a piped trace out of the pipe */
1814 if (auxtrace_buffer__get_data(buffer, fd)) {
1815 intel_pt_dump_event(pt, buffer->data,
1817 auxtrace_buffer__put_data(buffer);
1825 struct intel_pt_synth {
1826 struct perf_tool dummy_tool;
1827 struct perf_session *session;
1830 static int intel_pt_event_synth(struct perf_tool *tool,
1831 union perf_event *event,
1832 struct perf_sample *sample __maybe_unused,
1833 struct machine *machine __maybe_unused)
1835 struct intel_pt_synth *intel_pt_synth =
1836 container_of(tool, struct intel_pt_synth, dummy_tool);
1838 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
1842 static int intel_pt_synth_event(struct perf_session *session,
1843 struct perf_event_attr *attr, u64 id)
1845 struct intel_pt_synth intel_pt_synth;
1847 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
1848 intel_pt_synth.session = session;
1850 return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
1851 &id, intel_pt_event_synth);
1854 static int intel_pt_synth_events(struct intel_pt *pt,
1855 struct perf_session *session)
1857 struct perf_evlist *evlist = session->evlist;
1858 struct perf_evsel *evsel;
1859 struct perf_event_attr attr;
1864 evlist__for_each_entry(evlist, evsel) {
1865 if (evsel->attr.type == pt->pmu_type && evsel->ids) {
1872 pr_debug("There are no selected events with Intel Processor Trace data\n");
1876 memset(&attr, 0, sizeof(struct perf_event_attr));
1877 attr.size = sizeof(struct perf_event_attr);
1878 attr.type = PERF_TYPE_HARDWARE;
1879 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
1880 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
1882 if (pt->timeless_decoding)
1883 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
1885 attr.sample_type |= PERF_SAMPLE_TIME;
1886 if (!pt->per_cpu_mmaps)
1887 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
1888 attr.exclude_user = evsel->attr.exclude_user;
1889 attr.exclude_kernel = evsel->attr.exclude_kernel;
1890 attr.exclude_hv = evsel->attr.exclude_hv;
1891 attr.exclude_host = evsel->attr.exclude_host;
1892 attr.exclude_guest = evsel->attr.exclude_guest;
1893 attr.sample_id_all = evsel->attr.sample_id_all;
1894 attr.read_format = evsel->attr.read_format;
1896 id = evsel->id[0] + 1000000000;
1900 if (pt->synth_opts.instructions) {
1901 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1902 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
1903 attr.sample_period =
1904 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
1906 attr.sample_period = pt->synth_opts.period;
1907 pt->instructions_sample_period = attr.sample_period;
1908 if (pt->synth_opts.callchain)
1909 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
1910 if (pt->synth_opts.last_branch)
1911 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
1912 pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1913 id, (u64)attr.sample_type);
1914 err = intel_pt_synth_event(session, &attr, id);
1916 pr_err("%s: failed to synthesize 'instructions' event type\n",
1920 pt->sample_instructions = true;
1921 pt->instructions_sample_type = attr.sample_type;
1922 pt->instructions_id = id;
1926 if (pt->synth_opts.transactions) {
1927 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1928 attr.sample_period = 1;
1929 if (pt->synth_opts.callchain)
1930 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
1931 if (pt->synth_opts.last_branch)
1932 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
1933 pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1934 id, (u64)attr.sample_type);
1935 err = intel_pt_synth_event(session, &attr, id);
1937 pr_err("%s: failed to synthesize 'transactions' event type\n",
1941 pt->sample_transactions = true;
1942 pt->transactions_id = id;
1944 evlist__for_each_entry(evlist, evsel) {
1945 if (evsel->id && evsel->id[0] == pt->transactions_id) {
1947 zfree(&evsel->name);
1948 evsel->name = strdup("transactions");
1954 if (pt->synth_opts.branches) {
1955 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
1956 attr.sample_period = 1;
1957 attr.sample_type |= PERF_SAMPLE_ADDR;
1958 attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
1959 attr.sample_type &= ~(u64)PERF_SAMPLE_BRANCH_STACK;
1960 pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1961 id, (u64)attr.sample_type);
1962 err = intel_pt_synth_event(session, &attr, id);
1964 pr_err("%s: failed to synthesize 'branches' event type\n",
1968 pt->sample_branches = true;
1969 pt->branches_sample_type = attr.sample_type;
1970 pt->branches_id = id;
1973 pt->synth_needs_swap = evsel->needs_swap;
1978 static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
1980 struct perf_evsel *evsel;
1982 evlist__for_each_entry_reverse(evlist, evsel) {
1983 const char *name = perf_evsel__name(evsel);
1985 if (!strcmp(name, "sched:sched_switch"))
1992 static bool intel_pt_find_switch(struct perf_evlist *evlist)
1994 struct perf_evsel *evsel;
1996 evlist__for_each_entry(evlist, evsel) {
1997 if (evsel->attr.context_switch)
2004 static int intel_pt_perf_config(const char *var, const char *value, void *data)
2006 struct intel_pt *pt = data;
2008 if (!strcmp(var, "intel-pt.mispred-all"))
2009 pt->mispred_all = perf_config_bool(var, value);
2014 static const char * const intel_pt_info_fmts[] = {
2015 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
2016 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
2017 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
2018 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
2019 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
2020 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
2021 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
2022 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
2023 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
2024 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
2025 [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
2026 [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
2027 [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
2028 [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
2029 [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
2030 [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
2033 static void intel_pt_print_info(u64 *arr, int start, int finish)
2040 for (i = start; i <= finish; i++)
2041 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
2044 static void intel_pt_print_info_str(const char *name, const char *str)
2049 fprintf(stdout, " %-20s%s\n", name, str ? str : "");
2052 static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
2054 return auxtrace_info->header.size >=
2055 sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
2058 int intel_pt_process_auxtrace_info(union perf_event *event,
2059 struct perf_session *session)
2061 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
2062 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
2063 struct intel_pt *pt;
2068 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
2072 pt = zalloc(sizeof(struct intel_pt));
2076 perf_config(intel_pt_perf_config, pt);
2078 err = auxtrace_queues__init(&pt->queues);
2082 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
2084 pt->session = session;
2085 pt->machine = &session->machines.host; /* No kvm support */
2086 pt->auxtrace_type = auxtrace_info->type;
2087 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
2088 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
2089 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
2090 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
2091 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
2092 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
2093 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
2094 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
2095 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
2096 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
2097 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
2098 INTEL_PT_PER_CPU_MMAPS);
2100 if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
2101 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
2102 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
2103 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
2104 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
2105 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
2106 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
2110 if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
2111 pt->max_non_turbo_ratio =
2112 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
2113 intel_pt_print_info(&auxtrace_info->priv[0],
2114 INTEL_PT_MAX_NONTURBO_RATIO,
2115 INTEL_PT_MAX_NONTURBO_RATIO);
2118 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
2119 info_end = (void *)info + auxtrace_info->header.size;
2121 if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
2124 len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
2125 intel_pt_print_info(&auxtrace_info->priv[0],
2126 INTEL_PT_FILTER_STR_LEN,
2127 INTEL_PT_FILTER_STR_LEN);
2129 const char *filter = (const char *)info;
2131 len = roundup(len + 1, 8);
2133 if ((void *)info > info_end) {
2134 pr_err("%s: bad filter string length\n", __func__);
2136 goto err_free_queues;
2138 pt->filter = memdup(filter, len);
2141 goto err_free_queues;
2143 if (session->header.needs_swap)
2144 mem_bswap_64(pt->filter, len);
2145 if (pt->filter[len - 1]) {
2146 pr_err("%s: filter string not null terminated\n", __func__);
2148 goto err_free_queues;
2151 intel_pt_print_info_str("Filter string", pt->filter);
2154 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
2155 pt->have_tsc = intel_pt_have_tsc(pt);
2156 pt->sampling_mode = false;
2157 pt->est_tsc = !pt->timeless_decoding;
2159 pt->unknown_thread = thread__new(999999999, 999999999);
2160 if (!pt->unknown_thread) {
2162 goto err_free_queues;
2166 * Since this thread will not be kept in any rbtree not in a
2167 * list, initialize its list node so that at thread__put() the
2168 * current thread lifetime assuption is kept and we don't segfault
2169 * at list_del_init().
2171 INIT_LIST_HEAD(&pt->unknown_thread->node);
2173 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
2175 goto err_delete_thread;
2176 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
2178 goto err_delete_thread;
2181 pt->auxtrace.process_event = intel_pt_process_event;
2182 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
2183 pt->auxtrace.flush_events = intel_pt_flush;
2184 pt->auxtrace.free_events = intel_pt_free_events;
2185 pt->auxtrace.free = intel_pt_free;
2186 session->auxtrace = &pt->auxtrace;
2191 if (pt->have_sched_switch == 1) {
2192 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
2193 if (!pt->switch_evsel) {
2194 pr_err("%s: missing sched_switch event\n", __func__);
2196 goto err_delete_thread;
2198 } else if (pt->have_sched_switch == 2 &&
2199 !intel_pt_find_switch(session->evlist)) {
2200 pr_err("%s: missing context_switch attribute flag\n", __func__);
2202 goto err_delete_thread;
2205 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
2206 pt->synth_opts = *session->itrace_synth_opts;
2208 itrace_synth_opts__set_default(&pt->synth_opts);
2209 if (use_browser != -1) {
2210 pt->synth_opts.branches = false;
2211 pt->synth_opts.callchain = true;
2213 if (session->itrace_synth_opts)
2214 pt->synth_opts.thread_stack =
2215 session->itrace_synth_opts->thread_stack;
2218 if (pt->synth_opts.log)
2219 intel_pt_log_enable();
2221 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
2222 if (pt->tc.time_mult) {
2223 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
2225 if (!pt->max_non_turbo_ratio)
2226 pt->max_non_turbo_ratio =
2227 (tsc_freq + 50000000) / 100000000;
2228 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
2229 intel_pt_log("Maximum non-turbo ratio %u\n",
2230 pt->max_non_turbo_ratio);
2233 if (pt->synth_opts.calls)
2234 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
2235 PERF_IP_FLAG_TRACE_END;
2236 if (pt->synth_opts.returns)
2237 pt->branches_filter |= PERF_IP_FLAG_RETURN |
2238 PERF_IP_FLAG_TRACE_BEGIN;
2240 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
2241 symbol_conf.use_callchain = true;
2242 if (callchain_register_param(&callchain_param) < 0) {
2243 symbol_conf.use_callchain = false;
2244 pt->synth_opts.callchain = false;
2248 err = intel_pt_synth_events(pt, session);
2250 goto err_delete_thread;
2252 err = auxtrace_queues__process_index(&pt->queues, session);
2254 goto err_delete_thread;
2256 if (pt->queues.populated)
2257 pt->data_queued = true;
2259 if (pt->timeless_decoding)
2260 pr_debug2("Intel PT decoding without timestamps\n");
2265 thread__zput(pt->unknown_thread);
2267 intel_pt_log_disable();
2268 auxtrace_queues__free(&pt->queues);
2269 session->auxtrace = NULL;