2 * Copyright (C) 2009 The Android Open Source Project
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
17 #include "../../CompilerInternals.h"
18 #include "dexdump/OpCodeNames.h"
21 /* Decode and print a ARM register name */
22 static char * decodeRegList(int vector, char *buf)
27 for (i = 0; i < 8; i++, vector >>= 1) {
30 sprintf(buf + strlen(buf), ", r%d", i);
33 sprintf(buf, "r%d", i);
40 static int expandImmediate(int value)
42 int mode = (value & 0xf00) >> 8;
43 u4 bits = value & 0xff;
48 return (bits << 16) | bits;
50 return (bits << 24) | (bits << 8);
52 return (bits << 24) | (bits << 16) | (bits << 8) | bits;
56 bits = (bits | 0x80) << 24;
57 return bits >> (((value & 0xf80) >> 7) - 8);
61 * Interpret a format string and build a string no longer than size
62 * See format key in Assemble.c.
64 static void buildInsnString(char *fmt, ArmLIR *lir, char* buf,
65 unsigned char *baseAddr, int size)
68 char *bufEnd = &buf[size-1];
69 char *fmtEnd = &fmt[strlen(fmt)];
72 while (fmt < fmtEnd) {
82 assert((unsigned)(nc-'0') < 4);
83 operand = lir->operands[nc-'0'];
87 for (i=3; i>= 0; i--) {
88 tbuf[i] += operand & 1;
93 operand = ~expandImmediate(operand);
94 sprintf(tbuf,"%d [0x%x]", operand, operand);
97 operand = expandImmediate(operand);
98 sprintf(tbuf,"%d [0x%x]", operand, operand);
101 sprintf(tbuf,"s%d",operand & FP_REG_MASK);
104 sprintf(tbuf,"d%d",(operand & FP_REG_MASK) >> 1);
107 sprintf(tbuf,"%04x", operand);
111 sprintf(tbuf,"%d", operand);
114 sprintf(tbuf,"%d", operand*4);
117 sprintf(tbuf,"%d", operand*2);
151 sprintf(tbuf,"0x%08x",
152 (int) baseAddr + lir->generic.offset + 4 +
156 int offset_1 = lir->operands[0];
157 int offset_2 = NEXT_LIR(lir)->operands[0];
159 ((((intptr_t) baseAddr + lir->generic.offset + 4) &
160 ~3) + (offset_1 << 21 >> 9) + (offset_2 << 1)) &
162 sprintf(tbuf, "%p", (void *) target);
166 /* Nothing to print for BLX_2 */
168 strcpy(tbuf, "see above");
171 decodeRegList(operand, tbuf);
174 strcpy(tbuf,"DecodeError");
177 if (buf+strlen(tbuf) <= bufEnd) {
193 void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix)
197 ArmLIR *armLIR = (ArmLIR *) lir;
199 if (mask == ENCODE_ALL) {
205 for (i = 0; i < kRegEnd; i++) {
206 if (mask & (1ULL << i)) {
207 sprintf(num, "%d ", i);
212 if (mask & ENCODE_CCODE) {
215 if (mask & ENCODE_FP_STATUS) {
216 strcat(buf, "fpcc ");
218 if (armLIR && (mask & ENCODE_DALVIK_REG)) {
219 sprintf(buf + strlen(buf), "dr%d%s", armLIR->aliasInfo & 0xffff,
220 (armLIR->aliasInfo & 0x80000000) ? "(+1)" : "");
224 LOGD("%s: %s", prefix, buf);
231 #define DUMP_RESOURCE_MASK(X)
232 #define DUMP_SSA_REP(X)
234 /* Pretty-print a LIR instruction */
235 void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
237 ArmLIR *lir = (ArmLIR *) arg;
240 int offset = lir->generic.offset;
241 int dest = lir->operands[0];
242 u2 *cPtr = (u2*)baseAddr;
243 const bool dumpNop = false;
245 /* Handle pseudo-ops individually, and all regular insns as a group */
246 switch(lir->opCode) {
247 case kArmPseudoBarrier:
248 LOGD("-------- BARRIER");
250 case kArmPseudoExtended:
251 /* intentional fallthrough */
252 case kArmPseudoSSARep:
253 DUMP_SSA_REP(LOGD("-------- %s\n", (char *) dest));
255 case kArmPseudoTargetLabel:
257 case ARM_PSEUDO_kChainingCellBackwardBranch:
258 LOGD("-------- chaining cell (backward branch): 0x%04x\n", dest);
260 case ARM_PSEUDO_kChainingCellNormal:
261 LOGD("-------- chaining cell (normal): 0x%04x\n", dest);
263 case ARM_PSEUDO_kChainingCellHot:
264 LOGD("-------- chaining cell (hot): 0x%04x\n", dest);
266 case ARM_PSEUDO_kChainingCellInvokePredicted:
267 LOGD("-------- chaining cell (predicted)\n");
269 case ARM_PSEUDO_kChainingCellInvokeSingleton:
270 LOGD("-------- chaining cell (invoke singleton): %s/%p\n",
271 ((Method *)dest)->name,
272 ((Method *)dest)->insns);
274 case ARM_PSEUDO_kEntryBlock:
275 LOGD("-------- entry offset: 0x%04x\n", dest);
277 case ARM_PSEUDO_kDalvikByteCode_BOUNDARY:
278 LOGD("-------- dalvik offset: 0x%04x @ %s\n", dest,
279 (char *) lir->operands[1]);
281 case ARM_PSEUDO_kExitBlock:
282 LOGD("-------- exit offset: 0x%04x\n", dest);
284 case kArmPseudoPseudoAlign4:
285 LOGD("%p (%04x): .align4\n", baseAddr + offset, offset);
287 case ARM_PSEUDO_kPCReconstruction_CELL:
288 LOGD("-------- reconstruct dalvik PC : 0x%04x @ +0x%04x\n", dest,
291 case ARM_PSEUDO_kPCReconstruction_BLOCK_LABEL:
294 case kArmPseudoEHBlockLabel:
295 LOGD("Exception_Handling:\n");
297 case kArmPseudoNormalBlockLabel:
298 LOGD("L%#06x:\n", dest);
301 if (lir->isNop && !dumpNop) {
304 buildInsnString(EncodingMap[lir->opCode].name, lir, opName,
306 buildInsnString(EncodingMap[lir->opCode].fmt, lir, buf, baseAddr,
308 LOGD("%p (%04x): %-8s%s%s\n",
309 baseAddr + offset, offset, opName, buf,
310 lir->isNop ? "(nop)" : "");
314 if (lir->useMask && (!lir->isNop || dumpNop)) {
315 DUMP_RESOURCE_MASK(dvmDumpResourceMask((LIR *) lir,
316 lir->useMask, "use"));
318 if (lir->defMask && (!lir->isNop || dumpNop)) {
319 DUMP_RESOURCE_MASK(dvmDumpResourceMask((LIR *) lir,
320 lir->defMask, "def"));
324 /* Dump instructions and constant pool contents */
325 void dvmCompilerCodegenDump(CompilationUnit *cUnit)
327 LOGD("Dumping LIR insns\n");
331 LOGD("installed code is at %p\n", cUnit->baseAddr);
332 LOGD("total size is %d bytes\n", cUnit->totalSize);
333 for (lirInsn = cUnit->firstLIRInsn; lirInsn; lirInsn = lirInsn->next) {
334 dvmDumpLIRInsn(lirInsn, cUnit->baseAddr);
336 for (lirInsn = cUnit->wordList; lirInsn; lirInsn = lirInsn->next) {
337 armLIR = (ArmLIR *) lirInsn;
338 LOGD("%p (%04x): .word (0x%x)\n",
339 (char*)cUnit->baseAddr + armLIR->generic.offset,
340 armLIR->generic.offset,
341 armLIR->operands[0]);