1 %default { "naninst":"mvn r0, #0" }
3 * For the JIT: incoming arguments in r0-r1, r2-r3
6 * Compare two floating-point values. Puts 0, 1, or -1 into the
7 * destination register based on the results of the comparison.
9 * Provide a "naninst" instruction that puts 1 or -1 into r1 depending
10 * on what value we'd like to return when one of the operands is NaN.
12 * The operation we're implementing is:
20 * return {-1,1}; // one or both operands was NaN
22 * The straightforward implementation requires 3 calls to functions
23 * that return a result in r0. We can do it with two calls if our
24 * EABI library supports __aeabi_cfcmple (only one if we want to check
33 * for: cmpl-float, cmpg-float
35 /* op vAA, vBB, vCC */
36 mov r9, r0 @ Save copies - we may need to redo
38 mov r11, lr @ save return address
39 ldr ip, .L__aeabi_cfcmple @ cmp <=: C clear if <, Z set if eq
41 bhi .L${opcode}_gt_or_nan @ C set and Z clear, disambiguate
42 mvncc r0, #0 @ (less than) r0<- -1
43 moveq r0, #0 @ (equal) r0<- 0, trumps less than
45 @ Test for NaN with a second comparison. EABI forbids testing bit
46 @ patterns, and we can't represent 0x7fc00000 in immediate form, so
47 @ make the library call.
48 .L${opcode}_gt_or_nan:
49 mov r0, r10 @ restore in reverse order
51 ldr ip, .L__aeabi_cfcmple @ r0<- Z set if eq, C clear if <
53 movcc r0, #1 @ (greater than) r1<- 1
55 $naninst @ r1<- 1 or -1 for NaN