2 * This file was generated automatically by gen-mterp.py for 'armv5te-vfp'.
7 /* File: c/header.cpp */
9 * Copyright (C) 2008 The Android Open Source Project
11 * Licensed under the Apache License, Version 2.0 (the "License");
12 * you may not use this file except in compliance with the License.
13 * You may obtain a copy of the License at
15 * http://www.apache.org/licenses/LICENSE-2.0
17 * Unless required by applicable law or agreed to in writing, software
18 * distributed under the License is distributed on an "AS IS" BASIS,
19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
20 * See the License for the specific language governing permissions and
21 * limitations under the License.
26 #include "interp/InterpDefs.h"
27 #include "mterp/Mterp.h"
28 #include <math.h> // needed for fmod, fmodf
29 #include "mterp/common/FindInterface.h"
32 * Configuration defines. These affect the C implementations, i.e. the
33 * portable interpreter(s) and C stubs.
35 * Some defines are controlled by the Makefile, e.g.:
37 * WITH_TRACKREF_CHECKS
42 #ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
43 # define CHECK_BRANCH_OFFSETS
44 # define CHECK_REGISTER_INDICES
48 * Some architectures require 64-bit alignment for access to 64-bit data
49 * types. We can't just use pointers to copy 64-bit values out of our
50 * interpreted register set, because gcc may assume the pointer target is
51 * aligned and generate invalid code.
53 * There are two common approaches:
54 * (1) Use a union that defines a 32-bit pair and a 64-bit value.
57 * Depending upon what compiler you're using and what options are specified,
58 * one may be faster than the other. For example, the compiler might
59 * convert a memcpy() of 8 bytes into a series of instructions and omit
60 * the call. The union version could cause some strange side-effects,
61 * e.g. for a while ARM gcc thought it needed separate storage for each
62 * inlined instance, and generated instructions to zero out ~700 bytes of
63 * stack space at the top of the interpreter.
65 * The default is to use memcpy(). The current gcc for ARM seems to do
66 * better with the union.
68 #if defined(__ARM_EABI__)
69 # define NO_UNALIGN_64__UNION
73 //#define LOG_INSTR /* verbose debugging */
74 /* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
77 * Export another copy of the PC on every instruction; this is largely
78 * redundant with EXPORT_PC and the debugger code. This value can be
79 * compared against what we have stored on the stack with EXPORT_PC to
80 * help ensure that we aren't missing any export calls.
82 #if WITH_EXTRA_GC_CHECKS > 1
83 # define EXPORT_EXTRA_PC() (self->currentPc2 = pc)
85 # define EXPORT_EXTRA_PC()
89 * Adjust the program counter. "_offset" is a signed int, in 16-bit units.
91 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
93 * We don't advance the program counter until we finish an instruction or
94 * branch, because we do want to have to unroll the PC if there's an
97 #ifdef CHECK_BRANCH_OFFSETS
98 # define ADJUST_PC(_offset) do { \
99 int myoff = _offset; /* deref only once */ \
100 if (pc + myoff < curMethod->insns || \
101 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
104 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
105 LOGE("Invalid branch %d at 0x%04x in %s.%s %s", \
106 myoff, (int) (pc - curMethod->insns), \
107 curMethod->clazz->descriptor, curMethod->name, desc); \
115 # define ADJUST_PC(_offset) do { \
122 * If enabled, log instructions as we execute them.
125 # define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
126 # define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
127 # define ILOG(_level, ...) do { \
128 char debugStrBuf[128]; \
129 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
130 if (curMethod != NULL) \
131 ALOG(_level, LOG_TAG"i", "%-2d|%04x%s", \
132 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
134 ALOG(_level, LOG_TAG"i", "%-2d|####%s", \
135 self->threadId, debugStrBuf); \
137 void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
138 # define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
139 static const char kSpacing[] = " ";
141 # define ILOGD(...) ((void)0)
142 # define ILOGV(...) ((void)0)
143 # define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
146 /* get a long from an array of u4 */
147 static inline s8 getLongFromArray(const u4* ptr, int idx)
149 #if defined(NO_UNALIGN_64__UNION)
150 union { s8 ll; u4 parts[2]; } conv;
153 conv.parts[0] = ptr[0];
154 conv.parts[1] = ptr[1];
158 memcpy(&val, &ptr[idx], 8);
163 /* store a long into an array of u4 */
164 static inline void putLongToArray(u4* ptr, int idx, s8 val)
166 #if defined(NO_UNALIGN_64__UNION)
167 union { s8 ll; u4 parts[2]; } conv;
171 ptr[0] = conv.parts[0];
172 ptr[1] = conv.parts[1];
174 memcpy(&ptr[idx], &val, 8);
178 /* get a double from an array of u4 */
179 static inline double getDoubleFromArray(const u4* ptr, int idx)
181 #if defined(NO_UNALIGN_64__UNION)
182 union { double d; u4 parts[2]; } conv;
185 conv.parts[0] = ptr[0];
186 conv.parts[1] = ptr[1];
190 memcpy(&dval, &ptr[idx], 8);
195 /* store a double into an array of u4 */
196 static inline void putDoubleToArray(u4* ptr, int idx, double dval)
198 #if defined(NO_UNALIGN_64__UNION)
199 union { double d; u4 parts[2]; } conv;
203 ptr[0] = conv.parts[0];
204 ptr[1] = conv.parts[1];
206 memcpy(&ptr[idx], &dval, 8);
211 * If enabled, validate the register number on every access. Otherwise,
212 * just do an array access.
214 * Assumes the existence of "u4* fp".
216 * "_idx" may be referenced more than once.
218 #ifdef CHECK_REGISTER_INDICES
219 # define GET_REGISTER(_idx) \
220 ( (_idx) < curMethod->registersSize ? \
221 (fp[(_idx)]) : (assert(!"bad reg"),1969) )
222 # define SET_REGISTER(_idx, _val) \
223 ( (_idx) < curMethod->registersSize ? \
224 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
225 # define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
226 # define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
227 # define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
228 # define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
229 # define GET_REGISTER_WIDE(_idx) \
230 ( (_idx) < curMethod->registersSize-1 ? \
231 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
232 # define SET_REGISTER_WIDE(_idx, _val) \
233 ( (_idx) < curMethod->registersSize-1 ? \
234 (void)putLongToArray(fp, (_idx), (_val)) : assert(!"bad reg") )
235 # define GET_REGISTER_FLOAT(_idx) \
236 ( (_idx) < curMethod->registersSize ? \
237 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
238 # define SET_REGISTER_FLOAT(_idx, _val) \
239 ( (_idx) < curMethod->registersSize ? \
240 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
241 # define GET_REGISTER_DOUBLE(_idx) \
242 ( (_idx) < curMethod->registersSize-1 ? \
243 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
244 # define SET_REGISTER_DOUBLE(_idx, _val) \
245 ( (_idx) < curMethod->registersSize-1 ? \
246 (void)putDoubleToArray(fp, (_idx), (_val)) : assert(!"bad reg") )
248 # define GET_REGISTER(_idx) (fp[(_idx)])
249 # define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
250 # define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
251 # define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
252 # define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
253 # define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
254 # define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
255 # define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
256 # define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
257 # define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
258 # define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
259 # define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
263 * Get 16 bits from the specified offset of the program counter. We always
264 * want to load 16 bits at a time from the instruction stream -- it's more
265 * efficient than 8 and won't have the alignment problems that 32 might.
267 * Assumes existence of "const u2* pc".
269 #define FETCH(_offset) (pc[(_offset)])
272 * Extract instruction byte from 16-bit fetch (_inst is a u2).
274 #define INST_INST(_inst) ((_inst) & 0xff)
277 * Replace the opcode (used when handling breakpoints). _opcode is a u1.
279 #define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode)
282 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
284 #define INST_A(_inst) (((_inst) >> 8) & 0x0f)
285 #define INST_B(_inst) ((_inst) >> 12)
288 * Get the 8-bit "vAA" 8-bit register index from the instruction word.
291 #define INST_AA(_inst) ((_inst) >> 8)
294 * The current PC must be available to Throwable constructors, e.g.
295 * those created by the various exception throw routines, so that the
296 * exception stack trace can be generated correctly. If we don't do this,
297 * the offset within the current method won't be shown correctly. See the
298 * notes in Exception.c.
300 * This is also used to determine the address for precise GC.
302 * Assumes existence of "u4* fp" and "const u2* pc".
304 #define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
307 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the
308 * pc has already been exported to the stack.
310 * Perform additional checks on debug builds.
312 * Use this to check for NULL when the instruction handler calls into
313 * something that could throw an exception (so we have already called
314 * EXPORT_PC at the top).
316 static inline bool checkForNull(Object* obj)
319 dvmThrowNullPointerException(NULL);
322 #ifdef WITH_EXTRA_OBJECT_VALIDATION
323 if (!dvmIsHeapAddressObject(obj)) {
324 LOGE("Invalid object %p", obj);
329 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
330 /* probable heap corruption */
331 LOGE("Invalid object class %p (in %p)", obj->clazz, obj);
339 * Check to see if "obj" is NULL. If so, export the PC into the stack
340 * frame and throw an exception.
342 * Perform additional checks on debug builds.
344 * Use this to check for NULL when the instruction handler doesn't do
345 * anything else that can throw an exception.
347 static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
351 dvmThrowNullPointerException(NULL);
354 #ifdef WITH_EXTRA_OBJECT_VALIDATION
355 if (!dvmIsHeapAddress(obj)) {
356 LOGE("Invalid object %p", obj);
361 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
362 /* probable heap corruption */
363 LOGE("Invalid object class %p (in %p)", obj->clazz, obj);
370 /* File: cstubs/stubdefs.cpp */
372 * In the C mterp stubs, "goto" is a function call followed immediately
376 #define GOTO_TARGET_DECL(_target, ...) \
377 extern "C" void dvmMterp_##_target(Thread* self, ## __VA_ARGS__);
379 /* (void)xxx to quiet unused variable compiler warnings. */
380 #define GOTO_TARGET(_target, ...) \
381 void dvmMterp_##_target(Thread* self, ## __VA_ARGS__) { \
382 u2 ref, vsrc1, vsrc2, vdst; \
383 u2 inst = FETCH(0); \
384 const Method* methodToCall; \
385 StackSaveArea* debugSaveArea; \
386 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst; \
387 (void)methodToCall; (void)debugSaveArea;
389 #define GOTO_TARGET_END }
392 * Redefine what used to be local variable accesses into Thread struct
393 * references. (These are undefined down in "footer.cpp".)
395 #define retval self->interpSave.retval
396 #define pc self->interpSave.pc
397 #define fp self->interpSave.curFrame
398 #define curMethod self->interpSave.method
399 #define methodClassDex self->interpSave.methodClassDex
400 #define debugTrackedRefStart self->interpSave.debugTrackedRefStart
403 #define STUB_HACK(x) x
404 #if defined(WITH_JIT)
405 #define JIT_STUB_HACK(x) x
407 #define JIT_STUB_HACK(x)
411 * InterpSave's pc and fp must be valid when breaking out to a
412 * "Reportxxx" routine. Because the portable interpreter uses local
413 * variables for these, we must flush prior. Stubs, however, use
414 * the interpSave vars directly, so this is a nop for stubs.
416 #define PC_FP_TO_SELF()
420 * Opcode handler framing macros. Here, each opcode is a separate function
421 * that takes a "self" argument and returns void. We can't declare
422 * these "static" because they may be called from an assembly stub.
423 * (void)xxx to quiet unused variable compiler warnings.
425 #define HANDLE_OPCODE(_op) \
426 extern "C" void dvmMterp_##_op(Thread* self); \
427 void dvmMterp_##_op(Thread* self) { \
429 u2 vsrc1, vsrc2, vdst; \
430 u2 inst = FETCH(0); \
431 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst;
436 * Like the "portable" FINISH, but don't reload "inst", and return to caller
437 * when done. Further, debugger/profiler checks are handled
438 * before handler execution in mterp, so we don't do them here either.
440 #if defined(WITH_JIT)
441 #define FINISH(_offset) { \
442 ADJUST_PC(_offset); \
443 if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
444 dvmCheckJit(pc, self); \
449 #define FINISH(_offset) { \
450 ADJUST_PC(_offset); \
457 * The "goto label" statements turn into function calls followed by
458 * return statements. Some of the functions take arguments, which in the
459 * portable interpreter are handled by assigning values to globals.
462 #define GOTO_exceptionThrown() \
464 dvmMterp_exceptionThrown(self); \
468 #define GOTO_returnFromMethod() \
470 dvmMterp_returnFromMethod(self); \
474 #define GOTO_invoke(_target, _methodCallRange, _jumboFormat) \
476 dvmMterp_##_target(self, _methodCallRange, _jumboFormat); \
480 #define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \
482 dvmMterp_invokeMethod(self, _methodCallRange, _methodToCall, \
488 * As a special case, "goto bail" turns into a longjmp.
490 #define GOTO_bail() \
491 dvmMterpStdBail(self, false);
494 * Periodically check for thread suspension.
496 * While we're at it, see if a debugger has attached or the profiler has
499 #define PERIODIC_CHECKS(_pcadj) { \
500 if (dvmCheckSuspendQuick(self)) { \
501 EXPORT_PC(); /* need for precise GC */ \
502 dvmCheckSuspendPending(self); \
506 /* File: c/opcommon.cpp */
507 /* forward declarations of goto targets */
508 GOTO_TARGET_DECL(filledNewArray, bool methodCallRange, bool jumboFormat);
509 GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange, bool jumboFormat);
510 GOTO_TARGET_DECL(invokeSuper, bool methodCallRange, bool jumboFormat);
511 GOTO_TARGET_DECL(invokeInterface, bool methodCallRange, bool jumboFormat);
512 GOTO_TARGET_DECL(invokeDirect, bool methodCallRange, bool jumboFormat);
513 GOTO_TARGET_DECL(invokeStatic, bool methodCallRange, bool jumboFormat);
514 GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange, bool jumboFormat);
515 GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange, bool jumboFormat);
516 GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
518 GOTO_TARGET_DECL(returnFromMethod);
519 GOTO_TARGET_DECL(exceptionThrown);
522 * ===========================================================================
524 * What follows are opcode definitions shared between multiple opcodes with
525 * minor substitutions handled by the C pre-processor. These should probably
526 * use the mterp substitution mechanism instead, with the code here moved
527 * into common fragment files (like the asm "binop.S"), although it's hard
528 * to give up the C preprocessor in favor of the much simpler text subst.
530 * ===========================================================================
533 #define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
534 HANDLE_OPCODE(_opcode /*vA, vB*/) \
535 vdst = INST_A(inst); \
536 vsrc1 = INST_B(inst); \
537 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
538 SET_REGISTER##_totype(vdst, \
539 GET_REGISTER##_fromtype(vsrc1)); \
542 #define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
543 _tovtype, _tortype) \
544 HANDLE_OPCODE(_opcode /*vA, vB*/) \
546 /* spec defines specific handling for +/- inf and NaN values */ \
548 _tovtype intMin, intMax, result; \
549 vdst = INST_A(inst); \
550 vsrc1 = INST_B(inst); \
551 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
552 val = GET_REGISTER##_fromrtype(vsrc1); \
553 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
555 result = (_tovtype) val; \
556 if (val >= intMax) /* +inf */ \
558 else if (val <= intMin) /* -inf */ \
560 else if (val != val) /* NaN */ \
563 result = (_tovtype) val; \
564 SET_REGISTER##_tortype(vdst, result); \
568 #define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
569 HANDLE_OPCODE(_opcode /*vA, vB*/) \
570 vdst = INST_A(inst); \
571 vsrc1 = INST_B(inst); \
572 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
573 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
576 /* NOTE: the comparison result is always a signed 4-byte integer */
577 #define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
578 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
582 _varType val1, val2; \
583 vdst = INST_AA(inst); \
585 vsrc1 = regs & 0xff; \
587 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
588 val1 = GET_REGISTER##_type(vsrc1); \
589 val2 = GET_REGISTER##_type(vsrc2); \
592 else if (val1 < val2) \
594 else if (val1 > val2) \
597 result = (_nanVal); \
598 ILOGV("+ result=%d", result); \
599 SET_REGISTER(vdst, result); \
603 #define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
604 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
605 vsrc1 = INST_A(inst); \
606 vsrc2 = INST_B(inst); \
607 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
609 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
611 ILOGV("> branch taken"); \
612 if (branchOffset < 0) \
613 PERIODIC_CHECKS(branchOffset); \
614 FINISH(branchOffset); \
616 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
620 #define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
621 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
622 vsrc1 = INST_AA(inst); \
623 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
625 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
626 ILOGV("> branch taken"); \
627 if (branchOffset < 0) \
628 PERIODIC_CHECKS(branchOffset); \
629 FINISH(branchOffset); \
631 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
635 #define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
636 HANDLE_OPCODE(_opcode /*vA, vB*/) \
637 vdst = INST_A(inst); \
638 vsrc1 = INST_B(inst); \
639 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
640 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
643 #define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
644 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
647 vdst = INST_AA(inst); \
648 srcRegs = FETCH(1); \
649 vsrc1 = srcRegs & 0xff; \
650 vsrc2 = srcRegs >> 8; \
651 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
652 if (_chkdiv != 0) { \
653 s4 firstVal, secondVal, result; \
654 firstVal = GET_REGISTER(vsrc1); \
655 secondVal = GET_REGISTER(vsrc2); \
656 if (secondVal == 0) { \
658 dvmThrowArithmeticException("divide by zero"); \
659 GOTO_exceptionThrown(); \
661 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
663 result = firstVal; /* division */ \
665 result = 0; /* remainder */ \
667 result = firstVal _op secondVal; \
669 SET_REGISTER(vdst, result); \
671 /* non-div/rem case */ \
673 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
678 #define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
679 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
682 vdst = INST_AA(inst); \
683 srcRegs = FETCH(1); \
684 vsrc1 = srcRegs & 0xff; \
685 vsrc2 = srcRegs >> 8; \
686 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
688 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
692 #define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
693 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
694 vdst = INST_A(inst); \
695 vsrc1 = INST_B(inst); \
697 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
698 (_opname), vdst, vsrc1, vsrc2); \
699 if (_chkdiv != 0) { \
700 s4 firstVal, result; \
701 firstVal = GET_REGISTER(vsrc1); \
702 if ((s2) vsrc2 == 0) { \
704 dvmThrowArithmeticException("divide by zero"); \
705 GOTO_exceptionThrown(); \
707 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
708 /* won't generate /lit16 instr for this; check anyway */ \
710 result = firstVal; /* division */ \
712 result = 0; /* remainder */ \
714 result = firstVal _op (s2) vsrc2; \
716 SET_REGISTER(vdst, result); \
718 /* non-div/rem case */ \
719 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
723 #define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
724 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
727 vdst = INST_AA(inst); \
728 litInfo = FETCH(1); \
729 vsrc1 = litInfo & 0xff; \
730 vsrc2 = litInfo >> 8; /* constant */ \
731 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
732 (_opname), vdst, vsrc1, vsrc2); \
733 if (_chkdiv != 0) { \
734 s4 firstVal, result; \
735 firstVal = GET_REGISTER(vsrc1); \
736 if ((s1) vsrc2 == 0) { \
738 dvmThrowArithmeticException("divide by zero"); \
739 GOTO_exceptionThrown(); \
741 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
743 result = firstVal; /* division */ \
745 result = 0; /* remainder */ \
747 result = firstVal _op ((s1) vsrc2); \
749 SET_REGISTER(vdst, result); \
752 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
757 #define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
758 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
761 vdst = INST_AA(inst); \
762 litInfo = FETCH(1); \
763 vsrc1 = litInfo & 0xff; \
764 vsrc2 = litInfo >> 8; /* constant */ \
765 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
766 (_opname), vdst, vsrc1, vsrc2); \
768 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
772 #define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
773 HANDLE_OPCODE(_opcode /*vA, vB*/) \
774 vdst = INST_A(inst); \
775 vsrc1 = INST_B(inst); \
776 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
777 if (_chkdiv != 0) { \
778 s4 firstVal, secondVal, result; \
779 firstVal = GET_REGISTER(vdst); \
780 secondVal = GET_REGISTER(vsrc1); \
781 if (secondVal == 0) { \
783 dvmThrowArithmeticException("divide by zero"); \
784 GOTO_exceptionThrown(); \
786 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
788 result = firstVal; /* division */ \
790 result = 0; /* remainder */ \
792 result = firstVal _op secondVal; \
794 SET_REGISTER(vdst, result); \
797 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
801 #define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
802 HANDLE_OPCODE(_opcode /*vA, vB*/) \
803 vdst = INST_A(inst); \
804 vsrc1 = INST_B(inst); \
805 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
807 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
810 #define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
811 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
814 vdst = INST_AA(inst); \
815 srcRegs = FETCH(1); \
816 vsrc1 = srcRegs & 0xff; \
817 vsrc2 = srcRegs >> 8; \
818 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
819 if (_chkdiv != 0) { \
820 s8 firstVal, secondVal, result; \
821 firstVal = GET_REGISTER_WIDE(vsrc1); \
822 secondVal = GET_REGISTER_WIDE(vsrc2); \
823 if (secondVal == 0LL) { \
825 dvmThrowArithmeticException("divide by zero"); \
826 GOTO_exceptionThrown(); \
828 if ((u8)firstVal == 0x8000000000000000ULL && \
832 result = firstVal; /* division */ \
834 result = 0; /* remainder */ \
836 result = firstVal _op secondVal; \
838 SET_REGISTER_WIDE(vdst, result); \
840 SET_REGISTER_WIDE(vdst, \
841 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
846 #define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
847 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
850 vdst = INST_AA(inst); \
851 srcRegs = FETCH(1); \
852 vsrc1 = srcRegs & 0xff; \
853 vsrc2 = srcRegs >> 8; \
854 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
855 SET_REGISTER_WIDE(vdst, \
856 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
860 #define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
861 HANDLE_OPCODE(_opcode /*vA, vB*/) \
862 vdst = INST_A(inst); \
863 vsrc1 = INST_B(inst); \
864 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
865 if (_chkdiv != 0) { \
866 s8 firstVal, secondVal, result; \
867 firstVal = GET_REGISTER_WIDE(vdst); \
868 secondVal = GET_REGISTER_WIDE(vsrc1); \
869 if (secondVal == 0LL) { \
871 dvmThrowArithmeticException("divide by zero"); \
872 GOTO_exceptionThrown(); \
874 if ((u8)firstVal == 0x8000000000000000ULL && \
878 result = firstVal; /* division */ \
880 result = 0; /* remainder */ \
882 result = firstVal _op secondVal; \
884 SET_REGISTER_WIDE(vdst, result); \
886 SET_REGISTER_WIDE(vdst, \
887 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
891 #define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
892 HANDLE_OPCODE(_opcode /*vA, vB*/) \
893 vdst = INST_A(inst); \
894 vsrc1 = INST_B(inst); \
895 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
896 SET_REGISTER_WIDE(vdst, \
897 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
900 #define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
901 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
904 vdst = INST_AA(inst); \
905 srcRegs = FETCH(1); \
906 vsrc1 = srcRegs & 0xff; \
907 vsrc2 = srcRegs >> 8; \
908 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
909 SET_REGISTER_FLOAT(vdst, \
910 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
914 #define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
915 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
918 vdst = INST_AA(inst); \
919 srcRegs = FETCH(1); \
920 vsrc1 = srcRegs & 0xff; \
921 vsrc2 = srcRegs >> 8; \
922 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
923 SET_REGISTER_DOUBLE(vdst, \
924 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
928 #define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
929 HANDLE_OPCODE(_opcode /*vA, vB*/) \
930 vdst = INST_A(inst); \
931 vsrc1 = INST_B(inst); \
932 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
933 SET_REGISTER_FLOAT(vdst, \
934 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
937 #define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
938 HANDLE_OPCODE(_opcode /*vA, vB*/) \
939 vdst = INST_A(inst); \
940 vsrc1 = INST_B(inst); \
941 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
942 SET_REGISTER_DOUBLE(vdst, \
943 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
946 #define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
947 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
949 ArrayObject* arrayObj; \
952 vdst = INST_AA(inst); \
953 arrayInfo = FETCH(1); \
954 vsrc1 = arrayInfo & 0xff; /* array ptr */ \
955 vsrc2 = arrayInfo >> 8; /* index */ \
956 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
957 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
958 if (!checkForNull((Object*) arrayObj)) \
959 GOTO_exceptionThrown(); \
960 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
961 dvmThrowArrayIndexOutOfBoundsException( \
962 arrayObj->length, GET_REGISTER(vsrc2)); \
963 GOTO_exceptionThrown(); \
965 SET_REGISTER##_regsize(vdst, \
966 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)]); \
967 ILOGV("+ AGET[%d]=%#x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
971 #define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
972 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
974 ArrayObject* arrayObj; \
977 vdst = INST_AA(inst); /* AA: source value */ \
978 arrayInfo = FETCH(1); \
979 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
980 vsrc2 = arrayInfo >> 8; /* CC: index */ \
981 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
982 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
983 if (!checkForNull((Object*) arrayObj)) \
984 GOTO_exceptionThrown(); \
985 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
986 dvmThrowArrayIndexOutOfBoundsException( \
987 arrayObj->length, GET_REGISTER(vsrc2)); \
988 GOTO_exceptionThrown(); \
990 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
991 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)] = \
992 GET_REGISTER##_regsize(vdst); \
997 * It's possible to get a bad value out of a field with sub-32-bit stores
998 * because the -quick versions always operate on 32 bits. Consider:
999 * short foo = -1 (sets a 32-bit register to 0xffffffff)
1000 * iput-quick foo (writes all 32 bits to the field)
1001 * short bar = 1 (sets a 32-bit register to 0x00000001)
1002 * iput-short (writes the low 16 bits to the field)
1003 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
1004 * This can only happen when optimized and non-optimized code has interleaved
1005 * access to the same field. This is unlikely but possible.
1007 * The easiest way to fix this is to always read/write 32 bits at a time. On
1008 * a device with a 16-bit data bus this is sub-optimal. (The alternative
1009 * approach is to have sub-int versions of iget-quick, but now we're wasting
1010 * Dalvik instruction space and making it less likely that handler code will
1011 * already be in the CPU i-cache.)
1013 #define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
1014 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1016 InstField* ifield; \
1019 vdst = INST_A(inst); \
1020 vsrc1 = INST_B(inst); /* object ptr */ \
1021 ref = FETCH(1); /* field ref */ \
1022 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1023 obj = (Object*) GET_REGISTER(vsrc1); \
1024 if (!checkForNull(obj)) \
1025 GOTO_exceptionThrown(); \
1026 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1027 if (ifield == NULL) { \
1028 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1029 if (ifield == NULL) \
1030 GOTO_exceptionThrown(); \
1032 SET_REGISTER##_regsize(vdst, \
1033 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1034 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1035 (u8) GET_REGISTER##_regsize(vdst)); \
1039 #define HANDLE_IGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1040 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
1042 InstField* ifield; \
1045 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1047 vsrc1 = FETCH(4); /* object ptr */ \
1048 ILOGV("|iget%s/jumbo v%d,v%d,field@0x%08x", \
1049 (_opname), vdst, vsrc1, ref); \
1050 obj = (Object*) GET_REGISTER(vsrc1); \
1051 if (!checkForNull(obj)) \
1052 GOTO_exceptionThrown(); \
1053 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1054 if (ifield == NULL) { \
1055 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1056 if (ifield == NULL) \
1057 GOTO_exceptionThrown(); \
1059 SET_REGISTER##_regsize(vdst, \
1060 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1061 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1062 (u8) GET_REGISTER##_regsize(vdst)); \
1066 #define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1067 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1070 vdst = INST_A(inst); \
1071 vsrc1 = INST_B(inst); /* object ptr */ \
1072 ref = FETCH(1); /* field offset */ \
1073 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
1074 (_opname), vdst, vsrc1, ref); \
1075 obj = (Object*) GET_REGISTER(vsrc1); \
1076 if (!checkForNullExportPC(obj, fp, pc)) \
1077 GOTO_exceptionThrown(); \
1078 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
1079 ILOGV("+ IGETQ %d=0x%08llx", ref, \
1080 (u8) GET_REGISTER##_regsize(vdst)); \
1084 #define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
1085 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1087 InstField* ifield; \
1090 vdst = INST_A(inst); \
1091 vsrc1 = INST_B(inst); /* object ptr */ \
1092 ref = FETCH(1); /* field ref */ \
1093 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1094 obj = (Object*) GET_REGISTER(vsrc1); \
1095 if (!checkForNull(obj)) \
1096 GOTO_exceptionThrown(); \
1097 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1098 if (ifield == NULL) { \
1099 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1100 if (ifield == NULL) \
1101 GOTO_exceptionThrown(); \
1103 dvmSetField##_ftype(obj, ifield->byteOffset, \
1104 GET_REGISTER##_regsize(vdst)); \
1105 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1106 (u8) GET_REGISTER##_regsize(vdst)); \
1110 #define HANDLE_IPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1111 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
1113 InstField* ifield; \
1116 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1118 vsrc1 = FETCH(4); /* object ptr */ \
1119 ILOGV("|iput%s/jumbo v%d,v%d,field@0x%08x", \
1120 (_opname), vdst, vsrc1, ref); \
1121 obj = (Object*) GET_REGISTER(vsrc1); \
1122 if (!checkForNull(obj)) \
1123 GOTO_exceptionThrown(); \
1124 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1125 if (ifield == NULL) { \
1126 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1127 if (ifield == NULL) \
1128 GOTO_exceptionThrown(); \
1130 dvmSetField##_ftype(obj, ifield->byteOffset, \
1131 GET_REGISTER##_regsize(vdst)); \
1132 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1133 (u8) GET_REGISTER##_regsize(vdst)); \
1137 #define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1138 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1141 vdst = INST_A(inst); \
1142 vsrc1 = INST_B(inst); /* object ptr */ \
1143 ref = FETCH(1); /* field offset */ \
1144 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
1145 (_opname), vdst, vsrc1, ref); \
1146 obj = (Object*) GET_REGISTER(vsrc1); \
1147 if (!checkForNullExportPC(obj, fp, pc)) \
1148 GOTO_exceptionThrown(); \
1149 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
1150 ILOGV("+ IPUTQ %d=0x%08llx", ref, \
1151 (u8) GET_REGISTER##_regsize(vdst)); \
1156 * The JIT needs dvmDexGetResolvedField() to return non-null.
1157 * Because the portable interpreter is not involved with the JIT
1158 * and trace building, we only need the extra check here when this
1159 * code is massaged into a stub called from an assembly interpreter.
1160 * This is controlled by the JIT_STUB_HACK maco.
1163 #define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
1164 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1166 StaticField* sfield; \
1167 vdst = INST_AA(inst); \
1168 ref = FETCH(1); /* field ref */ \
1169 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1170 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1171 if (sfield == NULL) { \
1173 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1174 if (sfield == NULL) \
1175 GOTO_exceptionThrown(); \
1176 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1177 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1180 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1181 ILOGV("+ SGET '%s'=0x%08llx", \
1182 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1186 #define HANDLE_SGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1187 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
1189 StaticField* sfield; \
1190 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1192 ILOGV("|sget%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
1193 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1194 if (sfield == NULL) { \
1196 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1197 if (sfield == NULL) \
1198 GOTO_exceptionThrown(); \
1199 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1200 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1203 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1204 ILOGV("+ SGET '%s'=0x%08llx", \
1205 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1209 #define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
1210 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1212 StaticField* sfield; \
1213 vdst = INST_AA(inst); \
1214 ref = FETCH(1); /* field ref */ \
1215 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1216 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1217 if (sfield == NULL) { \
1219 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1220 if (sfield == NULL) \
1221 GOTO_exceptionThrown(); \
1222 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1223 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1226 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1227 ILOGV("+ SPUT '%s'=0x%08llx", \
1228 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1232 #define HANDLE_SPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1233 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
1235 StaticField* sfield; \
1236 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1238 ILOGV("|sput%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
1239 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1240 if (sfield == NULL) { \
1242 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1243 if (sfield == NULL) \
1244 GOTO_exceptionThrown(); \
1245 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1246 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1249 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1250 ILOGV("+ SPUT '%s'=0x%08llx", \
1251 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1255 /* File: cstubs/enddefs.cpp */
1257 /* undefine "magic" name remapping */
1262 #undef methodClassDex
1264 #undef debugTrackedRefStart
1266 /* File: armv5te/debug.cpp */
1267 #include <inttypes.h>
1270 * Dump the fixed-purpose ARM registers, along with some other info.
1272 * This function MUST be compiled in ARM mode -- THUMB will yield bogus
1275 * This will NOT preserve r0-r3/ip.
1277 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3)
1279 register uint32_t rPC asm("r4");
1280 register uint32_t rFP asm("r5");
1281 register uint32_t rSELF asm("r6");
1282 register uint32_t rINST asm("r7");
1283 register uint32_t rIBASE asm("r8");
1284 register uint32_t r9 asm("r9");
1285 register uint32_t r10 asm("r10");
1287 //extern char dvmAsmInstructionStart[];
1289 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
1290 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1291 rPC, rFP, rSELF, rINST);
1292 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10);
1294 //Thread* self = (Thread*) rSELF;
1295 //const Method* method = self->method;
1296 printf(" + self is %p\n", dvmThreadSelf());
1297 //printf(" + currently in %s.%s %s\n",
1298 // method->clazz->descriptor, method->name, method->shorty);
1299 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart);
1300 //printf(" + next handler for 0x%02x = %p\n",
1301 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64);
1305 * Dump the StackSaveArea for the specified frame pointer.
1307 void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea)
1309 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp);
1310 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea);
1312 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n",
1313 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc,
1314 saveArea->method, saveArea->xtra.currentPc);
1316 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n",
1317 saveArea->prevFrame, saveArea->savedPc,
1318 saveArea->method, saveArea->xtra.currentPc,
1324 * Does the bulk of the work for common_printMethod().
1326 void dvmMterpPrintMethod(Method* method)
1329 * It is a direct (non-virtual) method if it is static, private,
1333 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) ||
1334 (method->name[0] == '<');
1336 char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
1338 printf("<%c:%s.%s %s> ",
1339 isDirect ? 'D' : 'V',
1340 method->clazz->descriptor,