- /*
- * Quoting Mesa ISL library:
- *
- * - For linear surfaces, additional padding of 64 bytes is required at
- * the bottom of the surface. This is in addition to the padding
- * required above.
- */
- if (bo->tiling == I915_TILING_NONE)
- bo->total_size += 64;
+static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height,
+ uint32_t format, uint64_t modifier)
+{
+ int ret;
+ size_t plane;
+ struct drm_i915_gem_create gem_create;
+ struct drm_i915_gem_set_tiling gem_set_tiling;
+
+ switch (modifier) {
+ case DRM_FORMAT_MOD_LINEAR:
+ bo->tiling = I915_TILING_NONE;
+ break;
+ case I915_FORMAT_MOD_X_TILED:
+ bo->tiling = I915_TILING_X;
+ break;
+ case I915_FORMAT_MOD_Y_TILED:
+ bo->tiling = I915_TILING_Y;
+ break;
+ }
+
+ bo->format_modifiers[0] = modifier;
+
+ if (format == DRM_FORMAT_YVU420_ANDROID) {
+ /*
+ * We only need to be able to use this as a linear texture,
+ * which doesn't put any HW restrictions on how we lay it
+ * out. The Android format does require the stride to be a
+ * multiple of 16 and expects the Cr and Cb stride to be
+ * ALIGN(Y_stride / 2, 16), which we can make happen by
+ * aligning to 32 bytes here.
+ */
+ uint32_t stride = ALIGN(width, 32);
+ drv_bo_from_format(bo, stride, height, format);
+ } else {
+ i915_bo_from_format(bo, width, height, format);
+ }