+#: build/C/man2/perf_event_open.2:1622
+msgid ""
+"If B<PERF_SAMPLE_STACK_USER> is enabled, then record the user stack to "
+"enable backtracing. I<size> is the size requested by the user in "
+"I<stack_user_size> or else the maximum record size. I<data> is the stack "
+"data. I<dyn_size> is the amount of data actually dumped (can be less than "
+"I<size>)."
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1622
+#, no-wrap
+msgid "I<weight>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1630
+msgid ""
+"If B<PERF_SAMPLE_WEIGHT> is enabled, then a 64 bit value provided by the "
+"hardware is recorded that indicates how costly the event was. This allows "
+"expensive events to stand out more clearly in profiles."
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1630
+#, no-wrap
+msgid "I<data_src>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1636
+msgid ""
+"If B<PERF_SAMPLE_DATA_SRC> is enabled, then a 64 bit value is recorded that "
+"is made up of the following fields:"
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1637
+#, no-wrap
+msgid "I<mem_op>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1650
+msgid ""
+"type of opcode, a bitwise combination of B<PERF_MEM_OP_NA> (not available), "
+"B<PERF_MEM_OP_LOAD> (load instruction), B<PERF_MEM_OP_STORE> (store "
+"instruction), B<PERF_MEM_OP_PFETCH> (prefetch), and B<PERF_MEM_OP_EXEC> "
+"(executable code)."
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1650
+#, no-wrap
+msgid "I<mem_lvl>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1681
+msgid ""
+"memory hierarchy level hit or miss, a bitwise combination of "
+"B<PERF_MEM_LVL_NA> (not available), B<PERF_MEM_LVL_HIT> (hit), "
+"B<PERF_MEM_LVL_MISS> (miss), B<PERF_MEM_LVL_L1> (level 1 cache), "
+"B<PERF_MEM_LVL_LFB> (line fill buffer), B<PERF_MEM_LVL_L2> (level 2 cache), "
+"B<PERF_MEM_LVL_L3> (level 3 cache), B<PERF_MEM_LVL_LOC_RAM> (local DRAM), "
+"B<PERF_MEM_LVL_REM_RAM1> (remote DRAM 1 hop), B<PERF_MEM_LVL_REM_RAM2> "
+"(remote DRAM 2 hops), B<PERF_MEM_LVL_REM_CCE1> (remote cache 1 hop), "
+"B<PERF_MEM_LVL_REM_CCE2> (remote cache 2 hops), B<PERF_MEM_LVL_IO> (I/O "
+"memory), and B<PERF_MEM_LVL_UNC> (uncached memory)."
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1681
+#, no-wrap
+msgid "I<mem_snoop>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1694
+msgid ""
+"snoop mode, a bitwise combination of B<PERF_MEM_SNOOP_NA> (not available), "
+"B<PERF_MEM_SNOOP_NONE> (no snoop), B<PERF_MEM_SNOOP_HIT> (snoop hit), "
+"B<PERF_MEM_SNOOP_MISS> (snoop miss), and B<PERF_MEM_SNOOP_HITM> (snoop hit "
+"modified)."
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1694
+#, no-wrap
+msgid "I<mem_lock>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1701
+msgid ""
+"lock instruction, a bitwise combination of B<PERF_MEM_LOCK_NA> (not "
+"available) and B<PERF_MEM_LOCK_LOCKED> (locked transaction)."
+msgstr ""
+
+#. type: TP
+#: build/C/man2/perf_event_open.2:1701
+#, no-wrap
+msgid "I<mem_dtlb>"
+msgstr ""
+
+#. type: Plain text
+#: build/C/man2/perf_event_open.2:1718
+msgid ""
+"tlb access hit or miss, a bitwise combination of B<PERF_MEM_TLB_NA> (not "
+"available), B<PERF_MEM_TLB_HIT> (hit), B<PERF_MEM_TLB_MISS> (miss), "
+"B<PERF_MEM_TLB_L1> (level 1 TLB), B<PERF_MEM_TLB_L2> (level 2 TLB), "
+"B<PERF_MEM_TLB_WK> (hardware walker), and B<PERF_MEM_TLB_OS> (OS fault "
+"handler)."