+ __DECL_ALIGNED(4 * sizeof(scrntype_t)) scrntype_t alpha_cache_16[4];
+ __DECL_ALIGNED(16) uint16_t mask_cache_16[4];
+ __DECL_ALIGNED(16) uint16_t mask_cache_16_neg[4];
+ __DECL_ALIGNED(16) uint8_t mask_cache_4[8];
+ __DECL_ALIGNED(16) uint8_t mask_cache_4_neg[8];
+ __DECL_ALIGNED(16) scrntype_t alpha_cache_4[16];
+ bool dirty = dirty_flag[addr >> 3];
+ // If Not dirty, alpha/mask already calced.
+ if(dirty) {
+ uint32_t layer = (addr >= 0x40000) ? 1 : 0;
+ uint32_t naddr = addr & 0x3ffff;
+ // alpha32768
+ uint16_t *vptr = vram_ptr[layer];
+ uint16_t *vptr8 = (uint8_t*)vptr;
+ for(int i = 0; i < 4; i++) {
+ pix_cache_16[i] = vptr[naddr >> 1];
+ }
+ for(int i = 0; i < 4; i++) {
+ alpha_cache_16[i] = alpha_32768c[pix_cache_16[i]];
+ mask_cache_16[i] = mask_32768c[pix_cache_16[i]];
+ mask_cache_16_neg[i] = ~mask_cache_16[i];
+ }
+ scrntype_t* palpha = &(alpha_buffer_32768[addr >> 1]);
+ uint16_t* pmask16 = &(mask_buffer_32768[addr >> 1]);
+ uint16_t* pmask16_neg = &(mask_buffer_32768_neg[addr >> 1]);
+ for(int i = 0; i < 4; i++) {
+ palpha[i] = alpha_cache_16[i];
+ pmask16[i] = mask_cache_16[i];
+ pmask16_neg[i] = mask_cache_16_neg[i];
+ }
+
+ for(int i = 0; i < 8; i++) {
+ pix_cache_8[i] = vptr8[naddr];
+ }
+ // Alpha8
+
+ for(int i = 0; i < 8; i++) {
+ alpha_cache_4[i << 1] = alpha_16c[pix_cache_8[i] << 1];
+ alpha_cache_4[(i << 1) + 1] = alpha_16c[(pix_cache_8[i] << 1) + 1];
+ }
+ for(int i = 0; i < 8; i++) {
+ mask_cache_4[i] = mask_16c[pix_cache_8[i]];
+ mask_cache_4_neg[i] = ~mask_cache_4[i];
+ }
+ palpha = &(alpha_buffer_16[addr << 1]);
+ uint16_t* pmask4 = &(mask_buffer_16[addr]);
+ uint16_t* pmask4_neg = &(mask_buffer_16_neg[addr]);
+ for(int i = 0; i < 16; i++) {
+ palpha[i] = alpha_cache_4[i];
+ }
+ for(int i = 0; i < 8; i++) {
+ pmask4[i] = mask_cache_4[i];
+ pmask4_neg[i] = mask_cache_4_neg[i];
+ }
+ }
+ return dirty;
+}
+
+
+uint32_t TOWNS_VRAM::read_plane_data8(uint32_t addr)
+{
+ // Plane Access
+ pair_t data_p;
+ uint32_t x_addr = 0;
+ uint8_t *p = (uint8_t*)vram;
+ uint32_t mod_pos;
+
+ // ToDo: Writing plane.
+ if(access_page1) x_addr = 0x40000; //?
+ addr = (addr & 0x7fff) << 3;
+ p = &(p[x_addr + addr]);
+
+ // 8bit -> 32bit
+ uint32_t *pp = (uint32_t *)p;
+ uint8_t tmp = 0;
+ uint32_t tmp_d = *pp;
+
+#ifdef __LITTLE_ENDIAN__
+ uint32_t tmp_m1 = 0x000000f0;
+ uint32_t tmp_m2 = 0x0000000f;
+#else
+ uint32_t tmp_m1 = 0xf0000000;
+ uint32_t tmp_m2 = 0x0f000000;
+#endif
+ uint32_t tmp_r;
+ tmp_d = tmp_d & write_plane_mask;
+
+ for(int i = 0; i < 4; i++) {
+ tmp <<= 2;
+ tmp = tmp | (((tmp_d & tmp_m1) != 0) ? 0x02 : 0x00);
+ tmp = tmp | (((tmp_d & tmp_m2) != 0) ? 0x01 : 0x00);
+
+#ifdef __LITTLE_ENDIAN__
+ tmp_d <<= 8;
+#else
+ tmp_d >>= 8;
+#endif
+ }
+ return tmp;
+}
+
+uint32_t TOWNS_VRAM::read_plane_data16(uint32_t addr)
+{
+ pair16_t d;
+ d.b.l = (uint8_t)(read_plane_data8(addr + 0));
+ d.b.h = (uint8_t)(read_plane_data8(addr + 1));
+ return (uint32_t)(d.w);
+}
+
+uint32_t TOWNS_VRAM::read_plane_data32(uint32_t addr)
+{
+ pair32_t d;
+ d.b.l = (uint8_t)(read_plane_data8(addr + 0));
+ d.b.h = (uint8_t)(read_plane_data8(addr + 1));
+ d.b.h2 = (uint8_t)(read_plane_data8(addr + 2));
+ d.b.h3 = (uint8_t)(read_plane_data8(addr + 3));
+ return d.d;