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[VM][PC9801] Enable to build PC-9801 with upstream 2018-10-05.
[csp-qt/common_source_project-fm7.git]
/
source
/
src
/
vm
/
pc9801
/
dmareg.cpp
diff --git
a/source/src/vm/pc9801/dmareg.cpp
b/source/src/vm/pc9801/dmareg.cpp
index
43ad38b
..
56eabe9
100644
(file)
--- a/
source/src/vm/pc9801/dmareg.cpp
+++ b/
source/src/vm/pc9801/dmareg.cpp
@@
-1,6
+1,8
@@
/*
NEC PC-9801VX Emulator 'ePC-9801VX'
NEC PC-9801RA Emulator 'ePC-9801RA'
/*
NEC PC-9801VX Emulator 'ePC-9801VX'
NEC PC-9801RA Emulator 'ePC-9801RA'
+ NEC PC-98XA Emulator 'ePC-98XA'
+ NEC PC-98XL Emulator 'ePC-98XL'
NEC PC-98RL Emulator 'ePC-98RL'
Author : Takeda.Toshiya
NEC PC-98RL Emulator 'ePC-98RL'
Author : Takeda.Toshiya
@@
-32,11
+34,11
@@
void DMAREG::write_io8(uint32_t addr, uint32_t data)
#if defined(SUPPORT_32BIT_ADDRESS)
d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0xff, 0x00ff);
#elif defined(_PC98XA)
#if defined(SUPPORT_32BIT_ADDRESS)
d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0xff, 0x00ff);
#elif defined(_PC98XA)
- d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0x7f, 0x
ff
ff);
+ d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0x7f, 0x
00
ff);
#elif defined(SUPPORT_24BIT_ADDRESS)
#elif defined(SUPPORT_24BIT_ADDRESS)
- d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0xff, 0x
ff
ff);
+ d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0xff, 0x
00
ff);
#else
#else
- d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0x0f, 0x
ff
ff);
+ d_dma->write_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3], data & 0x0f, 0x
00
ff);
#endif
break;
#if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
#endif
break;
#if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
@@
-59,30
+61,36
@@
void DMAREG::write_io8(uint32_t addr, uint32_t data)
case 0x0e07:
case 0x0e09:
case 0x0e0b:
case 0x0e07:
case 0x0e09:
case 0x0e0b:
- d_dma->write_signal(bank_hi_id[((addr - 0xe05) >> 1) & 3],
data
<< 8, 0xff00);
+ d_dma->write_signal(bank_hi_id[((addr - 0xe05) >> 1) & 3],
(data & 0xff)
<< 8, 0xff00);
break;
#endif
}
}
break;
#endif
}
}
+uint32_t DMAREG::read_io8(uint32_t addr)
+{
+ switch(addr) {
+ case 0x0021:
+ case 0x0023:
+ case 0x0025:
+ case 0x0027:
+ return d_dma->read_signal(bank_lo_id[((addr - 0x0021) >> 1) & 3]);
+ }
+ return 0xff;
+}
+
/*
#define STATE_VERSION 1
/*
#define STATE_VERSION 1
-
void DMAREG::save_state(FILEIO* state_fio
)
+
bool DMAREG::process_state(FILEIO* state_fio, bool loading
)
{
{
- state_fio->FputUint32(STATE_VERSION);
- state_fio->FputInt32(this_device_id);
-
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ return true;
}
}
-bool DMAREG::load_state(FILEIO* state_fio)
-{
- if(state_fio->FgetUint32() != STATE_VERSION) {
- return false;
- }
- if(state_fio->FgetInt32() != this_device_id) {
- return false;
- }
- return true;
-}
*/
*/