+ priv = calloc(1, sizeof(*priv));
+ drv->priv = priv;
+
+ memset(&args, 0, sizeof(args));
+ args.param = VIRTGPU_PARAM_3D_FEATURES;
+ args.value = (uint64_t)(uintptr_t)&priv->has_3d;
+ ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &args);
+ if (ret) {
+ drv_log("virtio 3D acceleration is not available\n");
+ /* Be paranoid */
+ priv->has_3d = 0;
+ }
+
+ drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+ &LINEAR_METADATA, BO_USE_RENDER_MASK);
+
+ if (priv->has_3d)
+ drv_add_combinations(drv, texture_source_formats,
+ ARRAY_SIZE(texture_source_formats), &LINEAR_METADATA,
+ BO_USE_TEXTURE_MASK);
+ else
+ drv_add_combinations(drv, dumb_texture_source_formats,
+ ARRAY_SIZE(dumb_texture_source_formats), &LINEAR_METADATA,
+ BO_USE_TEXTURE_MASK);
+
+ return drv_modify_linear_combinations(drv);
+}
+
+static void virtio_gpu_close(struct driver *drv)
+{
+ free(drv->priv);
+ drv->priv = NULL;
+}
+
+static int virtio_gpu_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
+ uint64_t use_flags)
+{
+ struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
+ if (priv->has_3d)
+ return virtio_virgl_bo_create(bo, width, height, format, use_flags);
+ else
+ return virtio_dumb_bo_create(bo, width, height, format, use_flags);
+}
+
+static int virtio_gpu_bo_destroy(struct bo *bo)
+{
+ struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
+ if (priv->has_3d)
+ return drv_gem_bo_destroy(bo);
+ else
+ return drv_dumb_bo_destroy(bo);
+}
+
+static void *virtio_gpu_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
+{
+ struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
+ if (priv->has_3d)
+ return virtio_virgl_bo_map(bo, vma, plane, map_flags);
+ else
+ return drv_dumb_bo_map(bo, vma, plane, map_flags);
+}
+
+static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
+{
+ int ret;
+ struct drm_virtgpu_3d_transfer_from_host xfer;
+ struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
+
+ if (!priv->has_3d)
+ return 0;
+
+ memset(&xfer, 0, sizeof(xfer));
+ xfer.bo_handle = mapping->vma->handle;
+ xfer.box.x = mapping->rect.x;
+ xfer.box.y = mapping->rect.y;
+ xfer.box.w = mapping->rect.width;
+ xfer.box.h = mapping->rect.height;
+ xfer.box.d = 1;
+
+ ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer);
+ if (ret) {
+ drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST failed with %s\n", strerror(errno));
+ return ret;
+ }
+
+ return 0;
+}
+
+static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
+{
+ int ret;
+ struct drm_virtgpu_3d_transfer_to_host xfer;
+ struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
+
+ if (!priv->has_3d)
+ return 0;
+
+ if (!(mapping->vma->map_flags & BO_MAP_WRITE))
+ return 0;
+
+ memset(&xfer, 0, sizeof(xfer));
+ xfer.bo_handle = mapping->vma->handle;
+ xfer.box.x = mapping->rect.x;
+ xfer.box.y = mapping->rect.y;
+ xfer.box.w = mapping->rect.width;
+ xfer.box.h = mapping->rect.height;
+ xfer.box.d = 1;
+
+ ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer);
+ if (ret) {
+ drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST failed with %s\n", strerror(errno));
+ return ret;
+ }
+
+ return 0;
+}
+
+static uint32_t virtio_gpu_resolve_format(uint32_t format, uint64_t use_flags)
+{
+ switch (format) {
+ case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
+ /*HACK: See b/28671744 */
+ return DRM_FORMAT_XBGR8888;
+ case DRM_FORMAT_FLEX_YCbCr_420_888:
+ return DRM_FORMAT_YVU420;
+ default:
+ return format;
+ }
+}
+
+const struct backend backend_virtio_gpu = {
+ .name = "virtio_gpu",
+ .init = virtio_gpu_init,
+ .close = virtio_gpu_close,
+ .bo_create = virtio_gpu_bo_create,
+ .bo_destroy = virtio_gpu_bo_destroy,
+ .bo_import = drv_prime_bo_import,
+ .bo_map = virtio_gpu_bo_map,
+ .bo_unmap = drv_bo_munmap,
+ .bo_invalidate = virtio_gpu_bo_invalidate,
+ .bo_flush = virtio_gpu_bo_flush,
+ .resolve_format = virtio_gpu_resolve_format,
+};