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Documentation: dt: atmel-at91: add clocks to system timer, rstc and shdwc
[sagit-ice-cold/kernel_xiaomi_msm8998.git] / Documentation / devicetree / bindings / arm / atmel-at91.txt
index 424ac8c..209710c 100644 (file)
@@ -50,6 +50,7 @@ System Timer (ST) required properties:
 - reg: Should contain registers location and length
 - interrupts: Should contain interrupt for the ST which is the IRQ line
   shared across all System Controller members.
+- clocks: phandle to input clock.
 Its subnodes can be:
 - watchdog: compatible should be "atmel,at91rm9200-wdt"
 
@@ -89,12 +90,14 @@ RSTC Reset Controller required properties:
 - compatible: Should be "atmel,<chip>-rstc".
   <chip> can be "at91sam9260" or "at91sam9g45"
 - reg: Should contain registers location and length
+- clocks: phandle to input clock.
 
 Example:
 
        rstc@fffffd00 {
                compatible = "atmel,at91sam9260-rstc";
                reg = <0xfffffd00 0x10>;
+               clocks = <&clk32k>;
        };
 
 RAMC SDRAM/DDR Controller required properties:
@@ -117,6 +120,7 @@ required properties:
 - compatible: Should be "atmel,<chip>-shdwc".
   <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
 - reg: Should contain registers location and length
+- clocks: phandle to input clock.
 
 optional properties:
 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
@@ -135,9 +139,10 @@ optional at91sam9x5 properties:
 
 Example:
 
-       rstc@fffffd00 {
-               compatible = "atmel,at91sam9260-rstc";
-               reg = <0xfffffd00 0x10>;
+       shdwc@fffffd10 {
+               compatible = "atmel,at91sam9260-shdwc";
+               reg = <0xfffffd10 0x10>;
+               clocks = <&clk32k>;
        };
 
 Special Function Registers (SFR)