Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / arm / boot / dts / imx6qdl.dtsi

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 03858d7..e716e6f 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -181,10 +181,10 @@
                        interrupt-names = "msi";
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
                                 <&clks IMX6QDL_CLK_LVDS1_GATE>,
                                 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
@@ -868,10 +868,31 @@
                        reg = <0x02100000 0x100000>;
                        ranges;
 
-                       caam@02100000 {
-                               reg = <0x02100000 0x40000>;
-                               interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
-                                            <0 106 IRQ_TYPE_LEVEL_HIGH>;
+                       crypto: caam@2100000 {
+                               compatible = "fsl,sec-v4.0";
+                               fsl,sec-era = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               reg = <0x2100000 0x10000>;
+                               ranges = <0 0x2100000 0x10000>;
+                               interrupt-parent = <&intc>;
+                               clocks = <&clks IMX6QDL_CLK_CAAM_MEM>,
+                                        <&clks IMX6QDL_CLK_CAAM_ACLK>,
+                                        <&clks IMX6QDL_CLK_CAAM_IPG>,
+                                        <&clks IMX6QDL_CLK_EIM_SLOW>;
+                               clock-names = "mem", "aclk", "ipg", "emi_slow";
+
+                               sec_jr0: jr0@1000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x1000 0x1000>;
+                                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                               };
+
+                               sec_jr1: jr1@2000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x2000 0x1000>;
+                                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                               };
                        };
 
                        aipstz@0217c000 { /* AIPSTZ2 */