ARM: DT: msm8960: Add sdcc nodes

[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / arm / boot / dts / qcom-msm8960.dtsi

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index 2f67724..e1b0d5c 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -2,6 +2,7 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 
@@ -188,5 +189,54 @@
                        clocks = <&gcc PRNG_CLK>;
                        clock-names = "core";
                };
+
+               /* Temporary fixed regulator */
+               vsdcc_fixed: vsdcc-regulator {
+                       compatible = "regulator-fixed";
+                       regulator-name = "SDCC Power";
+                       regulator-min-microvolt = <2700000>;
+                       regulator-max-microvolt = <2700000>;
+                       regulator-always-on;
+               };
+
+               amba {
+                       compatible = "arm,amba-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       sdcc1: sdcc@12400000 {
+                               status          = "disabled";
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               reg             = <0x12400000 0x8000>;
+                               interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <8>;
+                               max-frequency   = <96000000>;
+                               non-removable;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               vmmc-supply = <&vsdcc_fixed>;
+                       };
+
+                       sdcc3: sdcc@12180000 {
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               status          = "disabled";
+                               reg             = <0x12180000 0x8000>;
+                               interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <4>;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               max-frequency   = <192000000>;
+                               no-1-8-v;
+                               vmmc-supply = <&vsdcc_fixed>;
+                       };
+               };
        };
 };