OSDN Git Service

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[uclinux-h8/linux.git] / arch / arm64 / boot / dts / arm / juno-motherboard.dtsi
index 5ce111d..021e0f4 100644 (file)
                        clock-output-names = "juno_mb:clk25mhz";
                };
 
+               v2m_refclk1mhz: refclk1mhz {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <1000000>;
+                       clock-output-names = "juno_mb:refclk1mhz";
+               };
+
+               v2m_refclk32khz: refclk32khz {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+                       clock-output-names = "juno_mb:refclk32khz";
+               };
+
                motherboard {
                        compatible = "arm,vexpress,v2p-p1", "simple-bus";
                        #address-cells = <2>;  /* SMB chipselect number and offset */
                                regulator-always-on;
                        };
 
+                       gpio_keys {
+                               compatible = "gpio-keys";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               button@1 {
+                                       debounce_interval = <50>;
+                                       wakeup = <1>;
+                                       linux,code = <116>;
+                                       label = "POWER";
+                                       gpios = <&iofpga_gpio0 0 0x4>;
+                               };
+                               button@2 {
+                                       debounce_interval = <50>;
+                                       wakeup = <1>;
+                                       linux,code = <102>;
+                                       label = "HOME";
+                                       gpios = <&iofpga_gpio0 1 0x4>;
+                               };
+                               button@3 {
+                                       debounce_interval = <50>;
+                                       wakeup = <1>;
+                                       linux,code = <152>;
+                                       label = "RLOCK";
+                                       gpios = <&iofpga_gpio0 2 0x4>;
+                               };
+                               button@4 {
+                                       debounce_interval = <50>;
+                                       wakeup = <1>;
+                                       linux,code = <115>;
+                                       label = "VOL+";
+                                       gpios = <&iofpga_gpio0 3 0x4>;
+                               };
+                               button@5 {
+                                       debounce_interval = <50>;
+                                       wakeup = <1>;
+                                       linux,code = <114>;
+                                       label = "VOL-";
+                                       gpios = <&iofpga_gpio0 4 0x4>;
+                               };
+                               button@6 {
+                                       debounce_interval = <50>;
+                                       wakeup = <1>;
+                                       linux,code = <99>;
+                                       label = "NMI";
+                                       gpios = <&iofpga_gpio0 5 0x4>;
+                               };
+                       };
+
                        ethernet@2,00000000 {
                                compatible = "smsc,lan9118", "smsc,lan9115";
                                reg = <2 0x00000000 0x10000>;
                                #size-cells = <1>;
                                ranges = <0 3 0 0x200000>;
 
+                               v2m_sysctl: sysctl@020000 {
+                                       compatible = "arm,sp810", "arm,primecell";
+                                       reg = <0x020000 0x1000>;
+                                       clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
+                                       clock-names = "refclk", "timclk", "apb_pclk";
+                                       #clock-cells = <1>;
+                                       clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
+                               };
+
                                apbregs@010000 {
                                        compatible = "syscon", "simple-mfd";
                                        reg = <0x010000 0x1000>;
                                        compatible = "arm,sp804", "arm,primecell";
                                        reg = <0x110000 0x10000>;
                                        interrupts = <9>;
-                                       clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
-                                       clock-names = "timclken1", "apb_pclk";
+                                       clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>;
+                                       clock-names = "timclken1", "timclken2", "apb_pclk";
                                };
 
                                v2m_timer23: timer@120000 {
                                        compatible = "arm,sp804", "arm,primecell";
                                        reg = <0x120000 0x10000>;
                                        interrupts = <9>;
-                                       clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
-                                       clock-names = "timclken1", "apb_pclk";
+                                       clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>;
+                                       clock-names = "timclken1", "timclken2", "apb_pclk";
                                };
 
                                rtc@170000 {
                                        clocks = <&soc_smc50mhz>;
                                        clock-names = "apb_pclk";
                                };
+
+                               iofpga_gpio0: gpio@1d0000 {
+                                       compatible = "arm,pl061", "arm,primecell";
+                                       reg = <0x1d0000 0x1000>;
+                                       interrupts = <6>;
+                                       clocks = <&soc_smc50mhz>;
+                                       clock-names = "apb_pclk";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       interrupt-controller;
+                                       #interrupt-cells = <2>;
+                               };
                        };
                };