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Merge android-4.4-p.197 (93ec8fb) into msm-4.4
[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / arm64 / include / asm / cpufeature.h
index 47bd94b..2c94aec 100644 (file)
 #define ARM64_HAS_NO_HW_PREFETCH               8
 #define ARM64_HAS_UAO                          9
 #define ARM64_ALT_PAN_NOT_UAO                  10
-#define ARM64_HAS_VIRT_HOST_EXTN               11
-#define ARM64_WORKAROUND_CAVIUM_27456          12
-#define ARM64_HAS_32BIT_EL0                    13
-#define ARM64_UNMAP_KERNEL_AT_EL0              23
 
-#define ARM64_NCAPS                            24
+#define ARM64_WORKAROUND_CAVIUM_27456          11
+#define ARM64_HAS_VIRT_HOST_EXTN               12
+#define ARM64_HARDEN_BRANCH_PREDICTOR          13
+#define ARM64_UNMAP_KERNEL_AT_EL0              14
+#define ARM64_HAS_32BIT_EL0                    15
+#define ARM64_NCAPS                            16
 
 #ifndef __ASSEMBLY__
 
 #include <linux/kernel.h>
 
+extern const char *machine_name;
+
 /* CPU feature register tracking */
 enum ftr_type {
        FTR_EXACT,                      /* Use a predefined safe value */
@@ -93,9 +96,10 @@ struct arm64_cpu_capabilities {
 
                struct {        /* Feature register checking */
                        u32 sys_reg;
-                       int field_pos;
-                       int min_field_value;
-                       int hwcap_type;
+                       u8 field_pos;
+                       u8 min_field_value;
+                       u8 hwcap_type;
+                       bool sign;
                        unsigned long hwcap;
                };
        };
@@ -125,15 +129,15 @@ static inline void cpus_set_cap(unsigned int num)
 }
 
 static inline int __attribute_const__
-cpuid_feature_extract_field_width(u64 features, int field, int width)
+cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
 {
        return (s64)(features << (64 - width - field)) >> (64 - width);
 }
 
 static inline int __attribute_const__
-cpuid_feature_extract_field(u64 features, int field)
+cpuid_feature_extract_signed_field(u64 features, int field)
 {
-       return cpuid_feature_extract_field_width(features, field, 4);
+       return cpuid_feature_extract_signed_field_width(features, field, 4);
 }
 
 static inline unsigned int __attribute_const__
@@ -153,24 +157,32 @@ static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
        return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
 }
 
+static inline int __attribute_const__
+cpuid_feature_extract_field(u64 features, int field, bool sign)
+{
+       return (sign) ?
+               cpuid_feature_extract_signed_field(features, field) :
+               cpuid_feature_extract_unsigned_field(features, field);
+}
+
 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
 {
-       return ftrp->sign ?
-               cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) :
-               cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width);
+       return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
 }
 
 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
 {
-       return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
-               cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
+       return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
+               cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 }
 
 void __init setup_cpu_features(void);
 
 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
                            const char *info);
+void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
 void check_local_cpu_errata(void);
+void __init enable_errata_workarounds(void);
 
 #ifdef CONFIG_HOTPLUG_CPU
 void verify_local_cpu_capabilities(void);