arm64: Add skeleton to harden the branch predictor against aliasing attacks

[android-x86/kernel.git] / arch / arm64 / include / asm / sysreg.h

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 6c80b36..88bbe36 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -94,6 +94,10 @@
 #define SCTLR_ELx_A    (1 << 1)
 #define SCTLR_ELx_M    1
 
+#define SCTLR_EL2_RES1 ((1 << 4)  | (1 << 5)  | (1 << 11) | (1 << 16) | \
+                        (1 << 16) | (1 << 18) | (1 << 22) | (1 << 23) | \
+                        (1 << 28) | (1 << 29))
+
 #define SCTLR_ELx_FLAGS        (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \
                         SCTLR_ELx_SA | SCTLR_ELx_I)
 
@@ -113,6 +117,9 @@
 #define ID_AA64ISAR0_AES_SHIFT         4
 
 /* id_aa64pfr0 */
+#define ID_AA64PFR0_CSV3_SHIFT         60
+#define ID_AA64PFR0_CSV2_SHIFT         56
+#define ID_AA64PFR0_SVE_SHIFT          32
 #define ID_AA64PFR0_GIC_SHIFT          24
 #define ID_AA64PFR0_ASIMD_SHIFT                20
 #define ID_AA64PFR0_FP_SHIFT           16