Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[tomoyo/tomoyo-test1.git] / arch / arm64 / kernel / perf_event.c

diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 6164d38..348d12e 100644 (file)
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -26,6 +26,7 @@
 
 #include <linux/acpi.h>
 #include <linux/clocksource.h>
+#include <linux/kvm_host.h>
 #include <linux/of.h>
 #include <linux/perf/arm_pmu.h>
 #include <linux/platform_device.h>
@@ -528,12 +529,21 @@ static inline int armv8pmu_enable_counter(int idx)
 
 static inline void armv8pmu_enable_event_counter(struct perf_event *event)
 {
+       struct perf_event_attr *attr = &event->attr;
        int idx = event->hw.idx;
+       u32 counter_bits = BIT(ARMV8_IDX_TO_COUNTER(idx));
 
-       armv8pmu_enable_counter(idx);
        if (armv8pmu_event_is_chained(event))
-               armv8pmu_enable_counter(idx - 1);
-       isb();
+               counter_bits |= BIT(ARMV8_IDX_TO_COUNTER(idx - 1));
+
+       kvm_set_pmu_events(counter_bits, attr);
+
+       /* We rely on the hypervisor switch code to enable guest counters */
+       if (!kvm_pmu_counter_deferred(attr)) {
+               armv8pmu_enable_counter(idx);
+               if (armv8pmu_event_is_chained(event))
+                       armv8pmu_enable_counter(idx - 1);
+       }
 }
 
 static inline int armv8pmu_disable_counter(int idx)
@@ -546,11 +556,21 @@ static inline int armv8pmu_disable_counter(int idx)
 static inline void armv8pmu_disable_event_counter(struct perf_event *event)
 {
        struct hw_perf_event *hwc = &event->hw;
+       struct perf_event_attr *attr = &event->attr;
        int idx = hwc->idx;
+       u32 counter_bits = BIT(ARMV8_IDX_TO_COUNTER(idx));
 
        if (armv8pmu_event_is_chained(event))
-               armv8pmu_disable_counter(idx - 1);
-       armv8pmu_disable_counter(idx);
+               counter_bits |= BIT(ARMV8_IDX_TO_COUNTER(idx - 1));
+
+       kvm_clr_pmu_events(counter_bits);
+
+       /* We rely on the hypervisor switch code to disable guest counters */
+       if (!kvm_pmu_counter_deferred(attr)) {
+               if (armv8pmu_event_is_chained(event))
+                       armv8pmu_disable_counter(idx - 1);
+               armv8pmu_disable_counter(idx);
+       }
 }
 
 static inline int armv8pmu_enable_intens(int idx)
@@ -827,14 +847,23 @@ static int armv8pmu_set_event_filter(struct hw_perf_event *event,
         * with other architectures (x86 and Power).
         */
        if (is_kernel_in_hyp_mode()) {
-               if (!attr->exclude_kernel)
+               if (!attr->exclude_kernel && !attr->exclude_host)
                        config_base |= ARMV8_PMU_INCLUDE_EL2;
-       } else {
-               if (attr->exclude_kernel)
+               if (attr->exclude_guest)
                        config_base |= ARMV8_PMU_EXCLUDE_EL1;
-               if (!attr->exclude_hv)
+               if (attr->exclude_host)
+                       config_base |= ARMV8_PMU_EXCLUDE_EL0;
+       } else {
+               if (!attr->exclude_hv && !attr->exclude_host)
                        config_base |= ARMV8_PMU_INCLUDE_EL2;
        }
+
+       /*
+        * Filter out !VHE kernels and guest kernels
+        */
+       if (attr->exclude_kernel)
+               config_base |= ARMV8_PMU_EXCLUDE_EL1;
+
        if (attr->exclude_user)
                config_base |= ARMV8_PMU_EXCLUDE_EL0;
 
@@ -864,6 +893,9 @@ static void armv8pmu_reset(void *info)
                armv8pmu_disable_intens(idx);
        }
 
+       /* Clear the counters we flip at guest entry/exit */
+       kvm_clr_pmu_events(U32_MAX);
+
        /*
         * Initialize & Reset PMNC. Request overflow interrupt for
         * 64 bit cycle counter but cheat in armv8pmu_write_counter().