Merge 4.4.179 into android-4.4-p

[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / arm64 / mm / fault.c

diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index a13babf..5a3117c 100644 (file)
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -107,26 +107,27 @@ int ptep_set_access_flags(struct vm_area_struct *vma,
        /* only preserve the access flags and write permission */
        pte_val(entry) &= PTE_AF | PTE_WRITE | PTE_DIRTY;
 
-       /*
-        * PTE_RDONLY is cleared by default in the asm below, so set it in
-        * back if necessary (read-only or clean PTE).
-        */
+       /* set PTE_RDONLY if actual read-only or clean PTE */
        if (!pte_write(entry) || !pte_sw_dirty(entry))
                pte_val(entry) |= PTE_RDONLY;
 
        /*
         * Setting the flags must be done atomically to avoid racing with the
-        * hardware update of the access/dirty state.
+        * hardware update of the access/dirty state. The PTE_RDONLY bit must
+        * be set to the most permissive (lowest value) of *ptep and entry
+        * (calculated as: a & b == ~(~a | ~b)).
         */
+       pte_val(entry) ^= PTE_RDONLY;
        asm volatile("//        ptep_set_access_flags\n"
        "       prfm    pstl1strm, %2\n"
        "1:     ldxr    %0, %2\n"
-       "       and     %0, %0, %3              // clear PTE_RDONLY\n"
+       "       eor     %0, %0, %3              // negate PTE_RDONLY in *ptep\n"
        "       orr     %0, %0, %4              // set flags\n"
+       "       eor     %0, %0, %3              // negate final PTE_RDONLY\n"
        "       stxr    %w1, %0, %2\n"
        "       cbnz    %w1, 1b\n"
        : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
-       : "L" (~PTE_RDONLY), "r" (pte_val(entry)));
+       : "L" (PTE_RDONLY), "r" (pte_val(entry)));
 
        flush_tlb_fix_spurious_fault(vma, address);
        return 1;
@@ -617,26 +618,40 @@ void __init hook_debug_fault_code(int nr,
        debug_fault_info[nr].name       = name;
 }
 
-asmlinkage int __exception do_debug_exception(unsigned long addr,
+asmlinkage int __exception do_debug_exception(unsigned long addr_if_watchpoint,
                                              unsigned int esr,
                                              struct pt_regs *regs)
 {
        const struct fault_info *inf = debug_fault_info + DBG_ESR_EVT(esr);
+       unsigned long pc = instruction_pointer(regs);
        struct siginfo info;
+       int rv;
 
-       if (!inf->fn(addr, esr, regs))
-               return 1;
+       /*
+        * Tell lockdep we disabled irqs in entry.S. Do nothing if they were
+        * already disabled to preserve the last enabled/disabled addresses.
+        */
+       if (interrupts_enabled(regs))
+               trace_hardirqs_off();
 
-       pr_alert("Unhandled debug exception: %s (0x%08x) at 0x%016lx\n",
-                inf->name, esr, addr);
+       if (!inf->fn(addr_if_watchpoint, esr, regs)) {
+               rv = 1;
+       } else {
+               pr_alert("Unhandled debug exception: %s (0x%08x) at 0x%016lx\n",
+                        inf->name, esr, pc);
+
+               info.si_signo = inf->sig;
+               info.si_errno = 0;
+               info.si_code  = inf->code;
+               info.si_addr  = (void __user *)pc;
+               arm64_notify_die("", regs, &info, 0);
+               rv = 0;
+       }
 
-       info.si_signo = inf->sig;
-       info.si_errno = 0;
-       info.si_code  = inf->code;
-       info.si_addr  = (void __user *)addr;
-       arm64_notify_die("", regs, &info, 0);
+       if (interrupts_enabled(regs))
+               trace_hardirqs_on();
 
-       return 0;
+       return rv;
 }
 
 #ifdef CONFIG_ARM64_PAN