perf/x86/uncore: Correct the number of CHAs on EMR

[tomoyo/tomoyo-test1.git] / arch / x86 / events / intel / uncore_snbep.c

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 4d34998..8250f0f 100644 (file)
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -6474,8 +6474,18 @@ void spr_uncore_cpu_init(void)
 
        type = uncore_find_type_by_id(uncore_msr_uncores, UNCORE_SPR_CHA);
        if (type) {
+               /*
+                * The value from the discovery table (stored in the type->num_boxes
+                * of UNCORE_SPR_CHA) is incorrect on some SPR variants because of a
+                * firmware bug. Using the value from SPR_MSR_UNC_CBO_CONFIG to replace it.
+                */
                rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo);
-               type->num_boxes = num_cbo;
+               /*
+                * The MSR doesn't work on the EMR XCC, but the firmware bug doesn't impact
+                * the EMR XCC. Don't let the value from the MSR replace the existing value.
+                */
+               if (num_cbo)
+                       type->num_boxes = num_cbo;
        }
        spr_uncore_iio_free_running.num_boxes = uncore_type_max_boxes(uncore_msr_uncores, UNCORE_SPR_IIO);
 }