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KVM: X86: Provide a capability to disable cstate msr read intercepts
[tomoyo/tomoyo-test1.git] / arch / x86 / kvm / vmx / vmx.c
index 1ac1676..da24f18 100644 (file)
@@ -114,6 +114,9 @@ static u64 __read_mostly host_xss;
 bool __read_mostly enable_pml = 1;
 module_param_named(pml, enable_pml, bool, S_IRUGO);
 
+static bool __read_mostly dump_invalid_vmcs = 0;
+module_param(dump_invalid_vmcs, bool, 0644);
+
 #define MSR_BITMAP_MODE_X2APIC         1
 #define MSR_BITMAP_MODE_X2APIC_APICV   2
 
@@ -5607,15 +5610,24 @@ static void vmx_dump_dtsel(char *name, uint32_t limit)
 
 void dump_vmcs(void)
 {
-       u32 vmentry_ctl = vmcs_read32(VM_ENTRY_CONTROLS);
-       u32 vmexit_ctl = vmcs_read32(VM_EXIT_CONTROLS);
-       u32 cpu_based_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
-       u32 pin_based_exec_ctrl = vmcs_read32(PIN_BASED_VM_EXEC_CONTROL);
-       u32 secondary_exec_control = 0;
-       unsigned long cr4 = vmcs_readl(GUEST_CR4);
-       u64 efer = vmcs_read64(GUEST_IA32_EFER);
+       u32 vmentry_ctl, vmexit_ctl;
+       u32 cpu_based_exec_ctrl, pin_based_exec_ctrl, secondary_exec_control;
+       unsigned long cr4;
+       u64 efer;
        int i, n;
 
+       if (!dump_invalid_vmcs) {
+               pr_warn_ratelimited("set kvm_intel.dump_invalid_vmcs=1 to dump internal KVM state.\n");
+               return;
+       }
+
+       vmentry_ctl = vmcs_read32(VM_ENTRY_CONTROLS);
+       vmexit_ctl = vmcs_read32(VM_EXIT_CONTROLS);
+       cpu_based_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
+       pin_based_exec_ctrl = vmcs_read32(PIN_BASED_VM_EXEC_CONTROL);
+       cr4 = vmcs_readl(GUEST_CR4);
+       efer = vmcs_read64(GUEST_IA32_EFER);
+       secondary_exec_control = 0;
        if (cpu_has_secondary_exec_ctrls())
                secondary_exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
 
@@ -6433,6 +6445,10 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
 
        vmx_update_hv_timer(vcpu);
 
+       if (lapic_in_kernel(vcpu) &&
+               vcpu->arch.apic->lapic_timer.timer_advance_ns)
+               kvm_wait_lapic_expire(vcpu);
+
        /*
         * If this vCPU has touched SPEC_CTRL, restore the guest's value if
         * it's non-zero. Since vmentry is serialising on affected CPUs, there
@@ -6621,6 +6637,12 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
        vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_SYSENTER_CS, MSR_TYPE_RW);
        vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_SYSENTER_ESP, MSR_TYPE_RW);
        vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_SYSENTER_EIP, MSR_TYPE_RW);
+       if (kvm_cstate_in_guest(kvm)) {
+               vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C1_RES, MSR_TYPE_R);
+               vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C3_RESIDENCY, MSR_TYPE_R);
+               vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C6_RESIDENCY, MSR_TYPE_R);
+               vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C7_RESIDENCY, MSR_TYPE_R);
+       }
        vmx->msr_bitmap_mode = 0;
 
        vmx->loaded_vmcs = &vmx->vmcs01;
@@ -6717,22 +6739,22 @@ static int vmx_vm_init(struct kvm *kvm)
        return 0;
 }
 
-static void __init vmx_check_processor_compat(void *rtn)
+static int __init vmx_check_processor_compat(void)
 {
        struct vmcs_config vmcs_conf;
        struct vmx_capability vmx_cap;
 
-       *(int *)rtn = 0;
        if (setup_vmcs_config(&vmcs_conf, &vmx_cap) < 0)
-               *(int *)rtn = -EIO;
+               return -EIO;
        if (nested)
                nested_vmx_setup_ctls_msrs(&vmcs_conf.nested, vmx_cap.ept,
                                           enable_apicv);
        if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
                printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
                                smp_processor_id());
-               *(int *)rtn = -EIO;
+               return -EIO;
        }
+       return 0;
 }
 
 static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)