st ii clock counter enabled. bg not displayed again..

[motonesfpga/motonesfpga.git] / de0_cv_nes / de0_cv_nes.vhd

diff --git a/de0_cv_nes/de0_cv_nes.vhd b/de0_cv_nes/de0_cv_nes.vhd
index 95f6bf4..ffd310a 100644 (file)
--- a/de0_cv_nes/de0_cv_nes.vhd
+++ b/de0_cv_nes/de0_cv_nes.vhd
@@ -425,6 +425,9 @@ begin
 ------------------debug pin setting....--------------------    \r
 -----------------------------------------------------------\r
 -----------------------------------------------------------\r
+    --for debugging cpu timing, use ppu clock for jtag clock.\r
+    dbg_base_clk <= ppu_clk;\r
+\r
     clock_counter_inst : counter_register generic map (64) port map \r
         (cpu_clk, rst_n, '0', '1', (others=>'0'), clock_counter);\r
 \r