merge cpu test all

[motonesfpga/motonesfpga.git] / de1_nes / simulation / modelsim / de1_nes_run_msim_gate_vhdl.do

diff --git a/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do b/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do
index 11a6fd4..12948e0 100644 (file)
--- a/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do
+++ b/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do
@@ -39,6 +39,14 @@ add wave -label ea_carry   -radix decimal -unsigned  sim:/testbench_motones_sim/
 #add wave -label wait_a58_branch_next -radix hex sim:/testbench_motones_sim/sim_board/dbg_wait_a58_branch_next     \r
 \r
 \r
+add wave -divider cpu-work\r
+add wave -label acc -radix hex sim:/testbench_motones_sim/sim_board/dbg_acc\r
+add wave -label idl_l -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_data\r
+add wave -label idl_h -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_mask\r
+add wave -label pcl -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_ctrl\r
+add wave -label int_d_bus -radix hex sim:/testbench_motones_sim/sim_board/dbg_int_d_bus\r
+\r
+\r
 \r
 #add wave -divider regs\r
 #\r
@@ -117,7 +125,8 @@ wave zoom full
 \r
 #wave zoom range 3339700 ps 5138320 ps\r
 \r
-run 30 us\r
+run 50 us\r
+run 60 us\r
 \r
 ##wave addcursor 907923400 ps\r
 \r