nmi testbench update

[motonesfpga/motonesfpga.git] / de1_nes / simulation / modelsim / de1_nes_run_msim_gate_vhdl.do

diff --git a/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do b/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do
index c7eaaa8..9ffef8d 100644 (file)
--- a/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do
+++ b/de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do
@@ -16,6 +16,7 @@ vsim -t 1ps +transport_int_delays +transport_path_delays -sdftyp /sim_board=de1_
 \r
 add wave -divider cpu\r
 add wave -label rst_n       sim:/testbench_motones_sim/sim_board/rst_n\r
+add wave -label nmi_input   sim:/testbench_motones_sim/sim_board/dummy_nmi\r
 add wave -label cpu_clk       sim:/testbench_motones_sim/sim_board/dbg_cpu_clk\r
 #add wave -label vga_clk   sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_x(4)\r
 #add wave -label mem_clk sim:/testbench_motones_sim/sim_board/dbg_mem_clk\r
@@ -102,7 +103,7 @@ wave zoom full
 \r
 #wave zoom range 3339700 ps 5138320 ps\r
 \r
-run 36160968 ps\r
+run 100 us\r
 \r
 #wave zoom full\r
 \r