architecture stimulus of testbench_motones_sim is
component de1_nes
- port (
+ port (
--debug signal
signal dbg_cpu_clk : out std_logic;
signal dbg_ppu_clk : out std_logic;
signal dbg_mem_clk : out std_logic;
- signal dbg_addr : out std_logic_vector( 16 - 1 downto 0);
- signal dbg_d_io : inout std_logic_vector( 8 - 1 downto 0);
+ signal dbg_r_nw : out std_logic;
+ signal dbg_addr : out std_logic_vector( 16 - 1 downto 0);
+ signal dbg_d_io : out std_logic_vector( 8 - 1 downto 0);
signal dbg_vram_ad : out std_logic_vector (7 downto 0);
signal dbg_vram_a : out std_logic_vector (13 downto 8);
---monitor inside cpu
signal dbg_instruction : out std_logic_vector(7 downto 0);
- signal dbg_int_d_bus : out std_logic_vector(7 downto 0);
+ signal dbg_int_d_bus : out std_logic_vector(7 downto 0);
signal dbg_exec_cycle : out std_logic_vector (5 downto 0);
+ signal dbg_ea_carry : out std_logic;
-- signal dbg_index_bus : out std_logic_vector(7 downto 0);
-- signal dbg_acc_bus : out std_logic_vector(7 downto 0);
signal dbg_status : out std_logic_vector(7 downto 0);
- signal dbg_pcl, dbg_pch, dbg_sp, dbg_x, dbg_y, dbg_acc : out std_logic_vector(7 downto 0);
+-- signal dbg_pcl, dbg_pch : out std_logic_vector(7 downto 0);
+ signal dbg_sp, dbg_x, dbg_y, dbg_acc : out std_logic_vector(7 downto 0);
signal dbg_dec_oe_n : out std_logic;
signal dbg_dec_val : out std_logic_vector (7 downto 0);
signal dbg_int_dbus : out std_logic_vector (7 downto 0);
-- signal dbg_status_val : out std_logic_vector (7 downto 0);
- signal dbg_stat_we_n : out std_logic;
- signal dbg_idl_h, dbg_idl_l, dbg_dbb_r, dbg_dbb_w : out std_logic_vector (7 downto 0);
+-- signal dbg_stat_we_n : out std_logic;
+-- signal dbg_idl_h, dbg_idl_l, dbg_dbb_r, dbg_dbb_w : out std_logic_vector (7 downto 0);
+
+--ppu debug pins
signal dbg_ppu_ce_n : out std_logic;
signal dbg_ppu_ctrl, dbg_ppu_mask, dbg_ppu_status : out std_logic_vector (7 downto 0);
signal dbg_ppu_addr : out std_logic_vector (13 downto 0);
signal dbg_ppu_data, dbg_ppu_scrl_x, dbg_ppu_scrl_y : out std_logic_vector (7 downto 0);
--- signal dbg_disp_nt, dbg_disp_attr : out std_logic_vector (7 downto 0);
--- signal dbg_disp_ptn_h, dbg_disp_ptn_l : out std_logic_vector (15 downto 0);
- signal dbg_ppu_addr_we_n : out std_logic;
- signal dbg_ppu_clk_cnt : out std_logic_vector(1 downto 0);
+ signal dbg_disp_nt, dbg_disp_attr : out std_logic_vector (7 downto 0);
+ signal dbg_disp_ptn_h, dbg_disp_ptn_l : out std_logic_vector (15 downto 0);
--NES instance
- base_clk : in std_logic;
- rst_n : in std_logic;
- joypad1 : in std_logic_vector(7 downto 0);
- joypad2 : in std_logic_vector(7 downto 0);
- vga_clk : out std_logic;
- h_sync_n : out std_logic;
- v_sync_n : out std_logic;
- r : out std_logic_vector(3 downto 0);
- g : out std_logic_vector(3 downto 0);
- b : out std_logic_vector(3 downto 0)
- );
- end component;
-
- component vga_device
- port ( vga_clk : in std_logic;
- rst_n : in std_logic;
- h_sync_n : in std_logic;
- v_sync_n : in std_logic;
- r : in std_logic_vector(3 downto 0);
- g : in std_logic_vector(3 downto 0);
- b : in std_logic_vector(3 downto 0)
- );
+ base_clk : in std_logic;
+ rst_n : in std_logic;
+ joypad1 : in std_logic_vector(7 downto 0);
+ joypad2 : in std_logic_vector(7 downto 0);
+ h_sync_n : out std_logic;
+ v_sync_n : out std_logic;
+ r : out std_logic_vector(3 downto 0);
+ g : out std_logic_vector(3 downto 0);
+ b : out std_logic_vector(3 downto 0)
+ );
end component;
signal base_clk : std_logic;
- signal vga_clk : std_logic;
signal reset_input : std_logic;
signal h_sync_n : std_logic;
signal dbg_cpu_clk : std_logic;
signal dbg_ppu_clk : std_logic;
signal dbg_mem_clk : std_logic;
+ signal dbg_r_nw : std_logic;
signal dbg_addr : std_logic_vector( 16 - 1 downto 0);
signal dbg_d_io : std_logic_vector( 8 - 1 downto 0);
signal dbg_vram_ad : std_logic_vector (7 downto 0);
signal dbg_instruction : std_logic_vector(7 downto 0);
signal dbg_int_d_bus : std_logic_vector(7 downto 0);
signal dbg_exec_cycle : std_logic_vector (5 downto 0);
+ signal dbg_ea_carry : std_logic;
-- signal dbg_index_bus : std_logic_vector(7 downto 0);
-- signal dbg_acc_bus : std_logic_vector(7 downto 0);
signal dbg_status : std_logic_vector(7 downto 0);
dbg_cpu_clk,
dbg_ppu_clk,
dbg_mem_clk,
+dbg_r_nw,
dbg_addr,
dbg_d_io,
dbg_vram_ad,
dbg_instruction,
dbg_int_d_bus,
dbg_exec_cycle ,
+dbg_ea_carry ,
--dbg_index_bus ,
--dbg_acc_bus ,
dbg_status ,
-dbg_pcl, dbg_pch, dbg_sp, dbg_x, dbg_y, dbg_acc ,
+--dbg_pcl, dbg_pch,
+dbg_sp, dbg_x, dbg_y, dbg_acc ,
dbg_dec_oe_n ,
dbg_dec_val ,
dbg_int_dbus ,
--dbg_status_val ,
-dbg_stat_we_n ,
-dbg_idl_h, dbg_idl_l, dbg_dbb_r, dbg_dbb_w,
+--dbg_stat_we_n ,
+--dbg_idl_h, dbg_idl_l, dbg_dbb_r, dbg_dbb_w,
dbg_ppu_ce_n ,
dbg_ppu_ctrl, dbg_ppu_mask, dbg_ppu_status ,
dbg_ppu_addr ,
dbg_ppu_data, dbg_ppu_scrl_x, dbg_ppu_scrl_y,
---dbg_disp_nt, dbg_disp_attr ,
---dbg_disp_ptn_h, dbg_disp_ptn_l ,
-dbg_ppu_addr_we_n,
-dbg_ppu_clk_cnt ,
+dbg_disp_nt, dbg_disp_attr ,
+dbg_disp_ptn_h, dbg_disp_ptn_l ,
+--dbg_ppu_addr_we_n,
+--dbg_ppu_clk_cnt ,
base_clk, reset_input, joypad1, joypad2,
- vga_clk, h_sync_n, v_sync_n, r, g, b);
-
--- dummy_vga_disp : vga_device
--- port map (vga_clk, reset_input, h_sync_n, v_sync_n, r, g, b);
+ h_sync_n, v_sync_n, r, g, b);
--- input reset.
reset_p: process
OSDN Git Service
