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-<head>
-<title>binop</title>
-<link rel=stylesheet href="opcode.css">
-</head>
-
-<body>
-
-<h1>binop</h1>
-
-<h2>Purpose</h2>
-
-<p>
-Perform the identified binary operation on the two source registers, storing
-the result in the first source register.
-</p>
-
-<h2>Details</h2>
-
-<table class="instruc">
-<thead>
-<tr>
- <th>Op & Format</th>
- <th>Mnemonic / Syntax</th>
- <th>Arguments</th>
-</tr>
-</thead>
-<tbody>
-<tr>
- <td>90..af 23x</td>
- <td><i>binop</i> vAA, vBB, vCC<br/>
- 90: add-int<br/>
- 91: sub-int<br/>
- 92: mul-int<br/>
- 93: div-int<br/>
- 94: rem-int<br/>
- 95: and-int<br/>
- 96: or-int<br/>
- 97: xor-int<br/>
- 98: shl-int<br/>
- 99: shr-int<br/>
- 9a: ushr-int<br/>
- 9b: add-long<br/>
- 9c: sub-long<br/>
- 9d: mul-long<br/>
- 9e: div-long<br/>
- 9f: rem-long<br/>
- a0: and-long<br/>
- a1: or-long<br/>
- a2: xor-long<br/>
- a3: shl-long<br/>
- a4: shr-long<br/>
- a5: ushr-long<br/>
- a6: add-float<br/>
- a7: sub-float<br/>
- a8: mul-float<br/>
- a9: div-float<br/>
- aa: rem-float<br/>
- ab: add-double<br/>
- ac: sub-double<br/>
- ad: mul-double<br/>
- ae: div-double<br/>
- af: rem-double
- </td>
- <td><code>A:</code> destination register or pair (8 bits)<br/>
- <code>B:</code> first source register or pair (8 bits)<br/>
- <code>C:</code> second source register or pair (8 bits)</td>
-</tr>
-</tbody>
-</table>
-
-<h2>Constraints</h2>
-
-<ul>
- <li>
- All A, B and C must be valid register indices in the current stackframe.
- </li>
- <li>
- For the -long and -double variants, also A+1, B+1 and C+1 must be valid
- register indices.
- </li>
- <li>
- Registers vB and vC must be defined. They must both contain values that
- match the variant of the instruction (it's probably better to split this up
- into multiple pages again).
- </li>
-</ul>
-
-<h2>Behavior</h2>
-
-<ul>
- <li>
- The given operation <binop> is performed according to the semantics
- specified in table XXX.
- </li>
- <li>
- The result is stored in register vA, that is, vA'=<biop> vB.
- </li>
- <li>
- For the -double and -long variants, (vA+1) is also affected.
- </li>
- <li>
- As usual, neighboring registers might get undefined, if vA (and vA+1) were
- part of a register pair originally.
- </li>
-</ul>
-
-<h2>Exceptions</h2>
-
-<ul>
- <li>
- ArithmeticException if an error occurs during the instruction.
- </li>
-</ul>
-
-</body>
-</html>
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