Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

[tomoyo/tomoyo-test1.git] / drivers / clk / imx / clk-imx93.c

diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index dcc41d1..99cff1f 100644 (file)
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -28,6 +28,11 @@ enum clk_sel {
        MAX_SEL
 };
 
+static u32 share_count_sai1;
+static u32 share_count_sai2;
+static u32 share_count_sai3;
+static u32 share_count_mub;
+
 static const char *parent_names[MAX_SEL][4] = {
        {"osc_24m", "sys_pll_pfd0_div2", "sys_pll_pfd1_div2", "video_pll"},
        {"osc_24m", "sys_pll_pfd0_div2", "sys_pll_pfd1_div2", "sys_pll_pfd2_div2"},
@@ -146,6 +151,7 @@ static const struct imx93_clk_ccgr {
        char *parent_name;
        u32 off;
        unsigned long flags;
+       u32 *shared_count;
 } ccgr_array[] = {
        { IMX93_CLK_A55_GATE,           "a55",          "a55_root",             0x8000, },
        /* M33 critical clk for system run */
@@ -158,8 +164,10 @@ static const struct imx93_clk_ccgr {
        { IMX93_CLK_WDOG5_GATE,         "wdog5",        "osc_24m",              0x8400, },
        { IMX93_CLK_SEMA1_GATE,         "sema1",        "bus_aon_root",         0x8440, },
        { IMX93_CLK_SEMA2_GATE,         "sema2",        "bus_wakeup_root",      0x8480, },
-       { IMX93_CLK_MU_A_GATE,          "mu_a",         "bus_aon_root",         0x84c0, },
-       { IMX93_CLK_MU_B_GATE,          "mu_b",         "bus_aon_root",         0x8500, },
+       { IMX93_CLK_MU1_A_GATE,         "mu1_a",        "bus_aon_root",         0x84c0, CLK_IGNORE_UNUSED },
+       { IMX93_CLK_MU2_A_GATE,         "mu2_a",        "bus_wakeup_root",      0x84c0, CLK_IGNORE_UNUSED },
+       { IMX93_CLK_MU1_B_GATE,         "mu1_b",        "bus_aon_root",         0x8500, 0, &share_count_mub },
+       { IMX93_CLK_MU2_B_GATE,         "mu2_b",        "bus_wakeup_root",      0x8500, 0, &share_count_mub },
        { IMX93_CLK_EDMA1_GATE,         "edma1",        "m33_root",             0x8540, },
        { IMX93_CLK_EDMA2_GATE,         "edma2",        "wakeup_axi_root",      0x8580, },
        { IMX93_CLK_FLEXSPI1_GATE,      "flexspi",      "flexspi_root",         0x8640, },
@@ -210,9 +218,12 @@ static const struct imx93_clk_ccgr {
        { IMX93_CLK_USDHC1_GATE,        "usdhc1",       "usdhc1_root",          0x9380, },
        { IMX93_CLK_USDHC2_GATE,        "usdhc2",       "usdhc2_root",          0x93c0, },
        { IMX93_CLK_USDHC3_GATE,        "usdhc3",       "usdhc3_root",          0x9400, },
-       { IMX93_CLK_SAI1_GATE,          "sai1",         "sai1_root",            0x9440, },
-       { IMX93_CLK_SAI2_GATE,          "sai2",         "sai2_root",            0x9480, },
-       { IMX93_CLK_SAI3_GATE,          "sai3",         "sai3_root",            0x94c0, },
+       { IMX93_CLK_SAI1_GATE,          "sai1",         "sai1_root",            0x9440, 0, &share_count_sai1},
+       { IMX93_CLK_SAI1_IPG,           "sai1_ipg_clk", "bus_aon_root",         0x9440, 0, &share_count_sai1},
+       { IMX93_CLK_SAI2_GATE,          "sai2",         "sai2_root",            0x9480, 0, &share_count_sai2},
+       { IMX93_CLK_SAI2_IPG,           "sai2_ipg_clk", "bus_wakeup_root",      0x9480, 0, &share_count_sai2},
+       { IMX93_CLK_SAI3_GATE,          "sai3",         "sai3_root",            0x94c0, 0, &share_count_sai3},
+       { IMX93_CLK_SAI3_IPG,           "sai3_ipg_clk", "bus_wakeup_root",      0x94c0, 0, &share_count_sai3},
        { IMX93_CLK_MIPI_CSI_GATE,      "mipi_csi",     "media_apb_root",       0x9580, },
        { IMX93_CLK_MIPI_DSI_GATE,      "mipi_dsi",     "media_apb_root",       0x95c0, },
        { IMX93_CLK_LVDS_GATE,          "lvds",         "media_ldb_root",       0x9600, },
@@ -293,16 +304,15 @@ static int imx93_clocks_probe(struct platform_device *pdev)
                root = &root_array[i];
                clks[root->clk] = imx93_clk_composite_flags(root->name,
                                                            parent_names[root->sel],
-                                                           4, base + root->off,
+                                                           4, base + root->off, 3,
                                                            root->flags);
        }
 
        for (i = 0; i < ARRAY_SIZE(ccgr_array); i++) {
                ccgr = &ccgr_array[i];
-               clks[ccgr->clk] = imx_clk_hw_gate4_flags(ccgr->name,
-                                                        ccgr->parent_name,
-                                                        base + ccgr->off, 0,
-                                                        ccgr->flags);
+               clks[ccgr->clk] = imx93_clk_gate(NULL, ccgr->name, ccgr->parent_name,
+                                                ccgr->flags, base + ccgr->off, 0, 1, 1, 3,
+                                                ccgr->shared_count);
        }
 
        imx_check_clk_hws(clks, IMX93_CLK_END);