Merge tag 'topic/phy-compliance-2020-04-08' of git://anongit.freedesktop.org/drm...

[tomoyo/tomoyo-test1.git] / drivers / gpu / drm / drm_dp_helper.c

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 8ba4531..612a59e 100644 (file)
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1535,3 +1535,97 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S
        return num_bpc;
 }
 EXPORT_SYMBOL(drm_dp_dsc_sink_supported_input_bpcs);
+
+/**
+ * drm_dp_get_phy_test_pattern() - get the requested pattern from the sink.
+ * @aux: DisplayPort AUX channel
+ * @data: DP phy compliance test parameters.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux,
+                               struct drm_dp_phy_test_params *data)
+{
+       int err;
+       u8 rate, lanes;
+
+       err = drm_dp_dpcd_readb(aux, DP_TEST_LINK_RATE, &rate);
+       if (err < 0)
+               return err;
+       data->link_rate = drm_dp_bw_code_to_link_rate(rate);
+
+       err = drm_dp_dpcd_readb(aux, DP_TEST_LANE_COUNT, &lanes);
+       if (err < 0)
+               return err;
+       data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK;
+
+       if (lanes & DP_ENHANCED_FRAME_CAP)
+               data->enhanced_frame_cap = true;
+
+       err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern);
+       if (err < 0)
+               return err;
+
+       switch (data->phy_pattern) {
+       case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
+               err = drm_dp_dpcd_read(aux, DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
+                                      &data->custom80, sizeof(data->custom80));
+               if (err < 0)
+                       return err;
+
+               break;
+       case DP_PHY_TEST_PATTERN_CP2520:
+               err = drm_dp_dpcd_read(aux, DP_TEST_HBR2_SCRAMBLER_RESET,
+                                      &data->hbr2_reset,
+                                      sizeof(data->hbr2_reset));
+               if (err < 0)
+                       return err;
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL(drm_dp_get_phy_test_pattern);
+
+/**
+ * drm_dp_set_phy_test_pattern() - set the pattern to the sink.
+ * @aux: DisplayPort AUX channel
+ * @data: DP phy compliance test parameters.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux,
+                               struct drm_dp_phy_test_params *data, u8 dp_rev)
+{
+       int err, i;
+       u8 link_config[2];
+       u8 test_pattern;
+
+       link_config[0] = drm_dp_link_rate_to_bw_code(data->link_rate);
+       link_config[1] = data->num_lanes;
+       if (data->enhanced_frame_cap)
+               link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
+       err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, link_config, 2);
+       if (err < 0)
+               return err;
+
+       test_pattern = data->phy_pattern;
+       if (dp_rev < 0x12) {
+               test_pattern = (test_pattern << 2) &
+                              DP_LINK_QUAL_PATTERN_11_MASK;
+               err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET,
+                                        test_pattern);
+               if (err < 0)
+                       return err;
+       } else {
+               for (i = 0; i < data->num_lanes; i++) {
+                       err = drm_dp_dpcd_writeb(aux,
+                                                DP_LINK_QUAL_LANE0_SET + i,
+                                                test_pattern);
+                       if (err < 0)
+                               return err;
+               }
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL(drm_dp_set_phy_test_pattern);