Merge drm/drm-next into drm-intel-next-queued

[tomoyo/tomoyo-test1.git] / drivers / gpu / drm / i915 / i915_active.c

diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
index b0a4997..992b00f 100644 (file)
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -390,13 +390,23 @@ out:
        return err;
 }
 
-void i915_active_set_exclusive(struct i915_active *ref, struct dma_fence *f)
+struct dma_fence *
+i915_active_set_exclusive(struct i915_active *ref, struct dma_fence *f)
 {
+       struct dma_fence *prev;
+
        /* We expect the caller to manage the exclusive timeline ordering */
        GEM_BUG_ON(i915_active_is_idle(ref));
 
-       if (!__i915_active_fence_set(&ref->excl, f))
+       rcu_read_lock();
+       prev = __i915_active_fence_set(&ref->excl, f);
+       if (prev)
+               prev = dma_fence_get_rcu(prev);
+       else
                atomic_inc(&ref->count);
+       rcu_read_unlock();
+
+       return prev;
 }
 
 bool i915_active_acquire_if_busy(struct i915_active *ref)
@@ -623,6 +633,7 @@ int i915_active_acquire_preallocate_barrier(struct i915_active *ref,
         * We can then use the preallocated nodes in
         * i915_active_acquire_barrier()
         */
+       GEM_BUG_ON(!mask);
        for_each_engine_masked(engine, gt, mask, tmp) {
                u64 idx = engine->kernel_context->timeline->fence_context;
                struct llist_node *prev = first;
@@ -812,7 +823,6 @@ __i915_active_fence_set(struct i915_active_fence *active,
                __list_del_entry(&active->cb.node);
                spin_unlock(prev->lock); /* serialise with prev->cb_list */
        }
-       GEM_BUG_ON(rcu_access_pointer(active->fence) != fence);
        list_add_tail(&active->cb.node, &fence->cb_list);
        spin_unlock_irqrestore(fence->lock, flags);