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Merge tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/drm...
[uclinux-h8/linux.git] / drivers / gpu / drm / i915 / intel_dp.c
index ae4baf9..937ba31 100644 (file)
@@ -2759,11 +2759,6 @@ static void chv_pre_enable_dp(struct intel_encoder *encoder)
 
        /* Program Tx lane latency optimal setting*/
        for (i = 0; i < 4; i++) {
-               /* Set the latency optimal bit */
-               data = (i == 1) ? 0x0 : 0x6;
-               vlv_dpio_write(dev_priv, pipe, CHV_TX_DW11(ch, i),
-                               data << DPIO_FRC_LATENCY_SHFIT);
-
                /* Set the upar bit */
                data = (i == 1) ? 0x0 : 0x1;
                vlv_dpio_write(dev_priv, pipe, CHV_TX_DW14(ch, i),
@@ -5318,7 +5313,6 @@ static void intel_edp_drrs_downclock_work(struct work_struct *work)
                        downclock_mode->vrefresh);
 
 unlock:
-
        mutex_unlock(&dev_priv->drrs.mutex);
 }
 
@@ -5340,12 +5334,17 @@ void intel_edp_drrs_invalidate(struct drm_device *dev,
        struct drm_crtc *crtc;
        enum pipe pipe;
 
-       if (!dev_priv->drrs.dp)
+       if (dev_priv->drrs.type == DRRS_NOT_SUPPORTED)
                return;
 
-       cancel_delayed_work_sync(&dev_priv->drrs.work);
+       cancel_delayed_work(&dev_priv->drrs.work);
 
        mutex_lock(&dev_priv->drrs.mutex);
+       if (!dev_priv->drrs.dp) {
+               mutex_unlock(&dev_priv->drrs.mutex);
+               return;
+       }
+
        crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
        pipe = to_intel_crtc(crtc)->pipe;
 
@@ -5379,12 +5378,17 @@ void intel_edp_drrs_flush(struct drm_device *dev,
        struct drm_crtc *crtc;
        enum pipe pipe;
 
-       if (!dev_priv->drrs.dp)
+       if (dev_priv->drrs.type == DRRS_NOT_SUPPORTED)
                return;
 
-       cancel_delayed_work_sync(&dev_priv->drrs.work);
+       cancel_delayed_work(&dev_priv->drrs.work);
 
        mutex_lock(&dev_priv->drrs.mutex);
+       if (!dev_priv->drrs.dp) {
+               mutex_unlock(&dev_priv->drrs.mutex);
+               return;
+       }
+
        crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
        pipe = to_intel_crtc(crtc)->pipe;
        dev_priv->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
@@ -5455,6 +5459,9 @@ intel_dp_drrs_init(struct intel_connector *intel_connector,
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_display_mode *downclock_mode = NULL;
 
+       INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_edp_drrs_downclock_work);
+       mutex_init(&dev_priv->drrs.mutex);
+
        if (INTEL_INFO(dev)->gen <= 6) {
                DRM_DEBUG_KMS("DRRS supported for Gen7 and above\n");
                return NULL;
@@ -5473,10 +5480,6 @@ intel_dp_drrs_init(struct intel_connector *intel_connector,
                return NULL;
        }
 
-       INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_edp_drrs_downclock_work);
-
-       mutex_init(&dev_priv->drrs.mutex);
-
        dev_priv->drrs.type = dev_priv->vbt.drrs_type;
 
        dev_priv->drrs.refresh_rate_type = DRRS_HIGH_RR;