gpu: ipu-v3: Add Camera Sensor Interface unit

[sagit-ice-cold/kernel_xiaomi_msm8998.git] / drivers / gpu / ipu-v3 / ipu-prv.h

diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index c93f50e..9b274f1 100644 (file)
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -28,17 +28,25 @@ struct ipu_soc;
 #define IPUV3_CHANNEL_CSI1                      1
 #define IPUV3_CHANNEL_CSI2                      2
 #define IPUV3_CHANNEL_CSI3                      3
+#define IPUV3_CHANNEL_VDI_MEM_IC_VF              5
+#define IPUV3_CHANNEL_MEM_IC_PP                 11
+#define IPUV3_CHANNEL_MEM_IC_PRP_VF             12
+#define IPUV3_CHANNEL_G_MEM_IC_PRP_VF           14
+#define IPUV3_CHANNEL_G_MEM_IC_PP               15
+#define IPUV3_CHANNEL_IC_PRP_ENC_MEM            20
+#define IPUV3_CHANNEL_IC_PRP_VF_MEM             21
+#define IPUV3_CHANNEL_IC_PP_MEM                 22
 #define IPUV3_CHANNEL_MEM_BG_SYNC              23
 #define IPUV3_CHANNEL_MEM_FG_SYNC              27
 #define IPUV3_CHANNEL_MEM_DC_SYNC              28
 #define IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA                31
 #define IPUV3_CHANNEL_MEM_DC_ASYNC             41
-#define IPUV3_CHANNEL_ROT_ENC_MEM              45
-#define IPUV3_CHANNEL_ROT_VF_MEM               46
-#define IPUV3_CHANNEL_ROT_PP_MEM               47
-#define IPUV3_CHANNEL_ROT_ENC_MEM_OUT          48
-#define IPUV3_CHANNEL_ROT_VF_MEM_OUT           49
-#define IPUV3_CHANNEL_ROT_PP_MEM_OUT           50
+#define IPUV3_CHANNEL_MEM_ROT_ENC              45
+#define IPUV3_CHANNEL_MEM_ROT_VF               46
+#define IPUV3_CHANNEL_MEM_ROT_PP               47
+#define IPUV3_CHANNEL_ROT_ENC_MEM              48
+#define IPUV3_CHANNEL_ROT_VF_MEM               49
+#define IPUV3_CHANNEL_ROT_PP_MEM               50
 #define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA                51
 
 #define IPU_MCU_T_DEFAULT      8
@@ -148,6 +156,8 @@ struct ipuv3_channel {
        struct ipu_soc *ipu;
 };
 
+struct ipu_cpmem;
+struct ipu_csi;
 struct ipu_dc_priv;
 struct ipu_dmfc_priv;
 struct ipu_di;
@@ -164,7 +174,6 @@ struct ipu_soc {
 
        void __iomem            *cm_reg;
        void __iomem            *idmac_reg;
-       struct ipu_ch_param __iomem     *cpmem_base;
 
        int                     usecount;
 
@@ -176,13 +185,26 @@ struct ipu_soc {
        int                     irq_err;
        struct irq_domain       *domain;
 
+       struct ipu_cpmem        *cpmem_priv;
        struct ipu_dc_priv      *dc_priv;
        struct ipu_dp_priv      *dp_priv;
        struct ipu_dmfc_priv    *dmfc_priv;
        struct ipu_di           *di_priv[2];
+       struct ipu_csi          *csi_priv[2];
        struct ipu_smfc_priv    *smfc_priv;
 };
 
+static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset)
+{
+       return readl(ipu->idmac_reg + offset);
+}
+
+static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
+                                  unsigned offset)
+{
+       writel(value, ipu->idmac_reg + offset);
+}
+
 void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
 
 int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
@@ -191,6 +213,10 @@ int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
 bool ipu_idmac_channel_busy(struct ipu_soc *ipu, unsigned int chno);
 int ipu_wait_interrupt(struct ipu_soc *ipu, int irq, int ms);
 
+int ipu_csi_init(struct ipu_soc *ipu, struct device *dev, int id,
+                unsigned long base, u32 module, struct clk *clk_ipu);
+void ipu_csi_exit(struct ipu_soc *ipu, int id);
+
 int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id,
                unsigned long base, u32 module, struct clk *ipu_clk);
 void ipu_di_exit(struct ipu_soc *ipu, int id);