#include <asm/div64.h>
+#define DRV_NAME "iwl3945"
+
#include "iwl-3945-core.h"
#include "iwl-commands.h"
#include "iwl-3945.h"
#include "iwl-3945-fh.h"
#include "iwl-helpers.h"
+#include "iwl-dev.h"
static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
struct iwl3945_tx_queue *txq);
/*
* module name, copyright, version, etc.
- * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
*/
#define DRV_DESCRIPTION \
* (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
***************************************************/
-int iwl3945_queue_space(const struct iwl3945_queue *q)
-{
- int s = q->read_ptr - q->write_ptr;
-
- if (q->read_ptr > q->write_ptr)
- s -= q->n_bd;
-
- if (s <= 0)
- s += q->n_window;
- /* keep some reserve to not confuse empty and full situations */
- s -= 2;
- if (s < 0)
- s = 0;
- return s;
-}
-
-int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
+int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
{
return q->write_ptr > q->read_ptr ?
(i >= q->read_ptr && i < q->write_ptr) :
!(i < q->read_ptr && i >= q->write_ptr);
}
-
-static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
-{
- /* This is for scan command, the big buffer at end of command array */
- if (is_huge)
- return q->n_window; /* must be power of 2 */
-
- /* Otherwise, use normal size buffers */
- return index & (q->n_window - 1);
-}
-
/**
* iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
*/
-static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
+static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl_queue *q,
int count, int slots_num, u32 id)
{
q->n_bd = count;
*/
void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
{
- struct iwl3945_queue *q = &txq->q;
+ struct iwl_queue *q = &txq->q;
struct pci_dev *dev = priv->pci_dev;
int len;
static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
{
struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
- struct iwl3945_queue *q = &txq->q;
+ struct iwl_queue *q = &txq->q;
struct iwl3945_tfd_frame *tfd;
u32 *control_flags;
struct iwl3945_cmd *out_cmd;
/* If any of the command structures end up being larger than
* the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
* we will need to increase the size of the TFD entries */
- BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
+ BUG_ON((fix_size > TFD39_MAX_PAYLOAD_SIZE) &&
!(cmd->meta.flags & CMD_SIZE_HUGE));
return -EIO;
}
- if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
+ if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
IWL_ERROR("No space for Tx\n");
return -ENOSPC;
}
* be #ifdef'd out once the driver is stable and folks aren't actively
* making changes
*/
-static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
+static int iwl3945_check_rxon_cmd(struct iwl3945_priv *priv)
{
int error = 0;
int counter = 1;
+ struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
error |= le32_to_cpu(rxon->flags &
~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
- rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
+ rc = iwl3945_check_rxon_cmd(priv);
if (rc) {
IWL_ERROR("Invalid RXON configuration. Not committing.\n");
return -EINVAL;
/* default power management (not Tx power) table values */
/* for TIM 0-10 */
-static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
+static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
{{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
};
/* for TIM > 10 */
-static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
+static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
{{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
{
int rc = 0, i;
struct iwl3945_power_mgr *pow_data;
- int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
+ int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
u16 pci_pm;
IWL_DEBUG_POWER("Initialize power \n");
IWL_DEBUG_POWER("adjust power command flags\n");
- for (i = 0; i < IWL_POWER_AC; i++) {
+ for (i = 0; i < IWL39_POWER_AC; i++) {
cmd = &pow_data->pwr_range_0[i].cmd;
if (pci_pm & 0x1)
int rc = 0, i;
u8 skip;
u32 max_sleep = 0;
- struct iwl3945_power_vec_entry *range;
+ struct iwl_power_vec_entry *range;
u8 period = 0;
struct iwl3945_power_mgr *pow_data;
* if plugged into AC power, set to CAM ("continuously aware mode"),
* else user level */
switch (mode) {
- case IWL_POWER_BATTERY:
+ case IWL39_POWER_BATTERY:
final_mode = IWL_POWER_INDEX_3;
break;
- case IWL_POWER_AC:
+ case IWL39_POWER_AC:
final_mode = IWL_POWER_MODE_CAM;
break;
default:
static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv,
int mode)
{
- const struct iwl3945_channel_info *ch_info;
+ const struct iwl_channel_info *ch_info;
memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
{
if (mode == NL80211_IFTYPE_ADHOC) {
- const struct iwl3945_channel_info *ch_info;
+ const struct iwl_channel_info *ch_info;
ch_info = iwl3945_get_channel_info(priv,
priv->band,
u32 *control_flags;
int txq_id = skb_get_queue_mapping(skb);
struct iwl3945_tx_queue *txq = NULL;
- struct iwl3945_queue *q = NULL;
+ struct iwl_queue *q = NULL;
dma_addr_t phys_addr;
dma_addr_t txcmd_phys;
struct iwl3945_cmd *out_cmd = NULL;
if (rc)
return rc;
- if ((iwl3945_queue_space(q) < q->high_mark)
+ if ((iwl_queue_space(q) < q->high_mark)
&& priv->mac80211_registered) {
if (wait_write_ptr) {
spin_lock_irqsave(&priv->lock, flags);
int txq_id, int index)
{
struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
- struct iwl3945_queue *q = &txq->q;
+ struct iwl_queue *q = &txq->q;
int nfreed = 0;
if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
int *eeprom_ch_count,
- const struct iwl3945_eeprom_channel
+ const struct iwl_eeprom_channel
**eeprom_ch_info,
const u8 **eeprom_ch_index)
{
*
* Based on band and channel number.
*/
-const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
- enum ieee80211_band band, u16 channel)
+const struct iwl_channel_info *
+iwl3945_get_channel_info(const struct iwl3945_priv *priv,
+ enum ieee80211_band band, u16 channel)
{
int i;
{
int eeprom_ch_count = 0;
const u8 *eeprom_ch_index = NULL;
- const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
+ const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
int band, ch;
- struct iwl3945_channel_info *ch_info;
+ struct iwl_channel_info *ch_info;
if (priv->channel_count) {
IWL_DEBUG_INFO("Channel map already initialized.\n");
IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
- priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
+ priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
priv->channel_count, GFP_KERNEL);
if (!priv->channel_info) {
IWL_ERROR("Could not allocate channel_info\n");
{
const struct ieee80211_channel *channels = NULL;
const struct ieee80211_supported_band *sband;
- const struct iwl3945_channel_info *ch_info;
+ const struct iwl_channel_info *ch_info;
u16 passive_dwell = 0;
u16 active_dwell = 0;
int added, i;
rates[i].hw_value = i; /* Rate scaling will work on indexes */
rates[i].hw_value_short = i;
rates[i].flags = 0;
- if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
+ if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
/*
* If CCK != 1M then set short preamble rate flag.
*/
*/
static int iwl3945_init_geos(struct iwl3945_priv *priv)
{
- struct iwl3945_channel_info *ch;
+ struct iwl_channel_info *ch;
struct ieee80211_supported_band *sband;
struct ieee80211_channel *channels;
struct ieee80211_channel *geo_ch;
if (rc)
return rc;
- iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
+ iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
+ IWL39_RTC_INST_LOWER_BOUND);
errcnt = 0;
for (; len > 0; len -= sizeof(u32), image++) {
/* NOTE: Use the debugless read so we don't flood kernel log
* if IWL_DL_IO is set */
iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
- i + RTC_INST_LOWER_BOUND);
+ i + IWL39_RTC_INST_LOWER_BOUND);
val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image)) {
#if 0 /* Enable this if you want to see details */
IWL_DEBUG_INFO("Begin load bsm\n");
/* make sure bootstrap program is no larger than BSM's SRAM size */
- if (len > IWL_MAX_BSM_SIZE)
+ if (len > IWL39_MAX_BSM_SIZE)
return -EINVAL;
/* Tell bootstrap uCode where to find the "Initialize" uCode
/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
- RTC_INST_LOWER_BOUND);
+ IWL39_RTC_INST_LOWER_BOUND);
iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
/* Load bootstrap code into instruction SRAM now,
}
/* Verify that uCode images will fit in card's SRAM */
- if (inst_size > IWL_MAX_INST_SIZE) {
+ if (inst_size > IWL39_MAX_INST_SIZE) {
IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
inst_size);
ret = -EINVAL;
goto err_release;
}
- if (data_size > IWL_MAX_DATA_SIZE) {
+ if (data_size > IWL39_MAX_DATA_SIZE) {
IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
data_size);
ret = -EINVAL;
goto err_release;
}
- if (init_size > IWL_MAX_INST_SIZE) {
+ if (init_size > IWL39_MAX_INST_SIZE) {
IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
init_size);
ret = -EINVAL;
goto err_release;
}
- if (init_data_size > IWL_MAX_DATA_SIZE) {
+ if (init_data_size > IWL39_MAX_DATA_SIZE) {
IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
init_data_size);
ret = -EINVAL;
goto err_release;
}
- if (boot_size > IWL_MAX_BSM_SIZE) {
+ if (boot_size > IWL39_MAX_BSM_SIZE) {
IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
boot_size);
ret = -EINVAL;
static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
{
struct iwl3945_priv *priv = hw->priv;
- const struct iwl3945_channel_info *ch_info;
+ const struct iwl_channel_info *ch_info;
struct ieee80211_conf *conf = &hw->conf;
unsigned long flags;
int ret = 0;
struct iwl3945_priv *priv = hw->priv;
int i, avail;
struct iwl3945_tx_queue *txq;
- struct iwl3945_queue *q;
+ struct iwl_queue *q;
unsigned long flags;
IWL_DEBUG_MAC80211("enter\n");
for (i = 0; i < AC_NUM; i++) {
txq = &priv->txq[i];
q = &txq->q;
- avail = iwl3945_queue_space(q);
+ avail = iwl_queue_space(q);
stats[i].len = q->n_window - avail;
stats[i].limit = q->n_window - q->high_mark;
return 0;
}
-static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
- struct ieee80211_low_level_stats *stats)
-{
- return 0;
-}
-
static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
{
struct iwl3945_priv *priv = hw->priv;
goto out;
}
- if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
- mode = IWL_POWER_AC;
+ if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
+ (mode == IWL39_POWER_AC))
+ mode = IWL39_POWER_AC;
else
mode |= IWL_POWER_ENABLED;
p += sprintf(p, "%d ", level);
switch (level) {
case IWL_POWER_MODE_CAM:
- case IWL_POWER_AC:
+ case IWL39_POWER_AC:
p += sprintf(p, "(AC)");
break;
- case IWL_POWER_BATTERY:
+ case IWL39_POWER_BATTERY:
p += sprintf(p, "(BATTERY)");
break;
default:
.config_interface = iwl3945_mac_config_interface,
.configure_filter = iwl3945_configure_filter,
.set_key = iwl3945_mac_set_key,
- .get_stats = iwl3945_mac_get_stats,
.get_tx_stats = iwl3945_mac_get_tx_stats,
.conf_tx = iwl3945_mac_conf_tx,
.reset_tsf = iwl3945_mac_reset_tsf,
* 1. Allocating HW data
* ********************/
- if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
- (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
- IWL_ERROR("invalid queues_num, should be between %d and %d\n",
- IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
- err = -EINVAL;
- goto out;
- }
-
/* mac80211 allocates memory for this device instance, including
* space for this driver's private structure */
hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
if (hw == NULL) {
- IWL_ERROR("Can not allocate network device\n");
+ printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
err = -ENOMEM;
goto out;
}
priv->pci_dev = pdev;
priv->cfg = cfg;
+ if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
+ (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
+ IWL_ERROR("invalid queues_num, should be between %d and %d\n",
+ IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
+ err = -EINVAL;
+ goto out;
+ }
+
/* Disabling hardware scan means that mac80211 will perform scans
* "the hard way", rather than using device's scan. */
if (iwl3945_param_disable_hw_scan) {
priv->rates_mask = IWL_RATES_MASK;
/* If power management is turned on, default to AC mode */
- priv->power_mode = IWL_POWER_AC;
+ priv->power_mode = IWL39_POWER_AC;
priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
err = iwl3945_init_channel_map(priv);
ret = iwl3945_rate_control_register();
if (ret) {
- IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
+ printk(KERN_ERR DRV_NAME
+ "Unable to register rate control algorithm: %d\n", ret);
return ret;
}
ret = pci_register_driver(&iwl3945_driver);
if (ret) {
- IWL_ERROR("Unable to initialize PCI module\n");
+ printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
goto error_register;
}
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