PCI: Add pci_bus_addr_t

[android-x86/kernel.git] / drivers / pci / probe.c

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 8d2f400..f71cb7c 100644 (file)
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -253,8 +253,8 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
        }
 
        if (res->flags & IORESOURCE_MEM_64) {
-               if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
-                   sz64 > 0x100000000ULL) {
+               if ((sizeof(pci_bus_addr_t) < 8 || sizeof(resource_size_t) < 8)
+                   && sz64 > 0x100000000ULL) {
                        res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED;
                        res->start = 0;
                        res->end = 0;
@@ -263,7 +263,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                        goto out;
                }
 
-               if ((sizeof(dma_addr_t) < 8) && l) {
+               if ((sizeof(pci_bus_addr_t) < 8) && l) {
                        /* Above 32-bit boundary; try to reallocate */
                        res->flags |= IORESOURCE_UNSET;
                        res->start = 0;
@@ -398,7 +398,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
        struct pci_dev *dev = child->self;
        u16 mem_base_lo, mem_limit_lo;
        u64 base64, limit64;
-       dma_addr_t base, limit;
+       pci_bus_addr_t base, limit;
        struct pci_bus_region region;
        struct resource *res;
 
@@ -425,8 +425,8 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
                }
        }
 
-       base = (dma_addr_t) base64;
-       limit = (dma_addr_t) limit64;
+       base = (pci_bus_addr_t) base64;
+       limit = (pci_bus_addr_t) limit64;
 
        if (base != base64) {
                dev_err(&dev->dev, "can't handle bridge window above 4GB (bus address %#010llx)\n",