-*- text -*-
+* Add support for the Renesas RX processor.
+
+Changes in 2.20:
+
+* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
+ pseudo op. It marks the symbol as being globally unique in the entire
+ process.
+
+* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
+ in binary rather than text.
+
+* Add support for common symbol alignment to PE formats.
+
+* Add support for the new discriminator column in the DWARF line table,
+ with a discriminator operand for the .loc directive.
+
+* Add support for Sunplus score architecture.
+
+* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
+ indicate that if the symbol is the target of a relocation, its value should
+ not be use. Instead the function should be invoked and its result used as
+ the value.
+
+* Add support for Lattice Mico32 (lm32) architecture.
+
+* Add support for Xilinx MicroBlaze architecture.
+
+Changes in 2.19:
+
+* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
+ tables without runtime relocation.
+
+* New command line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
+ adds compatibility with H'00 style hex constants.
+
+* New command line option, -msse-check=[none|error|warning], for x86
+ targets.
+
+* New sub-option added to the assembler's -a command line switch to
+ generate a listing output. The 'g' sub-option will insert into the listing
+ various information about the assembly, such as assembler version, the
+ command line options used, and a time stamp.
+
+* New command line option -msse2avx for x86 target to encode SSE
+ instructions with VEX prefix.
+
+* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
+
+* New command line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
+ -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
+ -mnaked-reg and -mold-gcc, for x86 targets.
+
+* Support for generating wide character strings has been added via the new
+ pseudo ops: .string16, .string32 and .string64.
+
+* Support for SSE5 has been added to the i386 port.
+
+Changes in 2.18:
+
+* The GAS sources are now released under the GPLv3.
+
+* Support for the National Semiconductor CR16 target has been added.
+
+* Added gas .reloc pseudo. This is a low-level interface for creating
+ relocations.
+
+* Add support for x86_64 PE+ target.
+
+* Add support for Score target.
+
+Changes in 2.17:
+
+* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
+
+* Support for ms2 architecture has been added.
+
+* Support for the Z80 processor family has been added.
+
+* Add support for the "@<file>" syntax to the command line, so that extra
+ switches can be read from <file>.
+
* The SH target supports a new command line switch --enable-reg-prefix which,
if enabled, will allow register names to be optionally prefixed with a $
character. This allows register names to be distinguished from label names.
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