/* tc-cris.c -- Assembler code for the CRIS CPU core.
- Copyright (C) 2000 Free Software Foundation, Inc.
+ Copyright 2000, 2001 Free Software Foundation, Inc.
Contributed by Axis Communications AB, Lund, Sweden.
Originally written for GAS 1.38.1 by Mikael Asker.
- Updated, BFDized and GNUified by Hans-Peter Nilsson.
+ Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
- MA 02111-1307, USA. */
+ MA 02111-1307, USA. */
#include <stdio.h>
-#include <ctype.h>
#include "as.h"
+#include "safe-ctype.h"
#include "subsegs.h"
#include "opcode/cris.h"
+#include "dwarf2dbg.h"
/* Conventions used here:
Generally speaking, pointers to binutils types such as "fragS" and
that could clash with a current or future binutils or GAS function get
a "cris_" prefix. */
+#define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
+#define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
+#define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
+#define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
+#define REGISTER_PREFIX_CHAR '$'
+
+/* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
+ line_separator_chars for CRIS, so we avoid it. */
+#define PIC_SUFFIX_CHAR ':'
+
/* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
enum cris_insn_kind
/* The prefix for an instruction. */
struct cris_prefix
{
- enum prefix_kind kind;
- int base_reg_number;
- unsigned int opcode;
+ enum prefix_kind kind;
+ int base_reg_number;
+ unsigned int opcode;
/* There might be an expression to be evaluated, like I in [rN+I]. */
- expressionS expr;
+ expressionS expr;
/* If there's an expression, we might need a relocation. Here's the
type of what relocation to start relaxaton with.
enum bfd_reloc_code_real reloc;
};
-/* The description of the instruction being assembled. */
+/* The description of the instruction being assembled. */
struct cris_instruction
{
/* If CRIS_INSN_NONE, then this insn is of zero length. */
- enum cris_insn_kind insn_type;
+ enum cris_insn_kind insn_type;
/* If a special register was mentioned, this is its description, else
- it is NULL. */
+ it is NULL. */
const struct cris_spec_reg *spec_reg;
- unsigned int opcode;
+ unsigned int opcode;
/* An insn may have at most one expression; theoretically there could be
- another in its prefix (but I don't see how that could happen). */
- expressionS expr;
+ another in its prefix (but I don't see how that could happen). */
+ expressionS expr;
/* The expression might need a relocation. Here's one to start
relaxation with. */
- enum bfd_reloc_code_real reloc;
+ enum bfd_reloc_code_real reloc;
- /* The size in bytes of an immediate expression, or zero in
+ /* The size in bytes of an immediate expression, or zero if
nonapplicable. */
- int imm_oprnd_size;
+ int imm_oprnd_size;
};
static void cris_process_instruction PARAMS ((char *,
static int branch_disp PARAMS ((int));
static void gen_cond_branch_32 PARAMS ((char *, char *, fragS *,
symbolS *, symbolS *, long int));
-static void cris_number_to_imm PARAMS ((char *, long, int, fixS *));
+static void cris_number_to_imm PARAMS ((char *, long, int, fixS *, segT));
static void cris_create_short_jump PARAMS ((char *, addressT, addressT,
fragS *, symbolS *));
+static void s_syntax PARAMS ((int));
+static void s_cris_file PARAMS ((int));
+static void s_cris_loc PARAMS ((int));
+
+/* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
+static void cris_get_pic_suffix PARAMS ((char **,
+ bfd_reloc_code_real_type *,
+ expressionS *));
+static unsigned int cris_get_pic_reloc_size
+ PARAMS ((bfd_reloc_code_real_type));
+
+/* All the .syntax functions. */
+static void cris_force_reg_prefix PARAMS ((void));
+static void cris_relax_reg_prefix PARAMS ((void));
+static void cris_sym_leading_underscore PARAMS ((void));
+static void cris_sym_no_leading_underscore PARAMS ((void));
+static char *cris_insn_first_word_frag PARAMS ((void));
+
/* Handle to the opcode hash table. */
static struct hash_control *op_hash = NULL;
+/* Whether we demand that registers have a `$' prefix. Default here. */
+static boolean demand_register_prefix = false;
+
+/* Whether global user symbols have a leading underscore. Default here. */
+static boolean symbols_have_leading_underscore = true;
+
+/* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
+static boolean pic = false;
+
const pseudo_typeS md_pseudo_table[] =
{
{"dword", cons, 4},
+ {"syntax", s_syntax, 0},
+ {"file", s_cris_file, 0},
+ {"loc", s_cris_loc, 0},
{NULL, 0, 0}
};
/* This array holds the chars that only start a comment at the beginning of
a line. If the line seems to have the form '# 123 filename'
- .line and .file directives will appear in the pre-processed output */
+ .line and .file directives will appear in the pre-processed output. */
/* Note that input_file.c hand-checks for '#' at the beginning of the
first line of the input file. This is because the compiler outputs
- #NO_APP at the beginning of its output. */
-/* Also note that slash-star will always start a comment */
+ #NO_APP at the beginning of its output. */
+/* Also note that slash-star will always start a comment. */
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "@";
const char EXP_CHARS[] = "";
const char FLT_CHARS[] = "";
-
/* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
2 1 0
---/ /--+-----------------+-----------------+-----------------+
length: byte, word, 10-byte expansion
2. BDAP
- length: byte, word, dword */
+ length: byte, word, dword */
#define STATE_CONDITIONAL_BRANCH (1)
#define STATE_BASE_PLUS_DISP_PREFIX (2)
#define STATE_UNDF (3)
#define STATE_MAX_LENGTH (3)
-
/* These displacements are relative to the adress following the opcode
word of the instruction. The first letter is Byte, Word. The 2nd
letter is Forward, Backward. */
#define BRANCH_BF ( 254)
#define BRANCH_BB (-256)
-#define BRANCH_WF (2+ 32767)
-#define BRANCH_WB (2+-32768)
+#define BRANCH_WF (2 + 32767)
+#define BRANCH_WB (2 + -32768)
#define BDAP_BF ( 127)
#define BDAP_BB (-128)
/* Bcc o (1, 0). */
{BRANCH_BF, BRANCH_BB, 0, ENCODE_RELAX (1, 1)},
- /* Bcc [PC+] (1, 1). */
+ /* Bcc [PC+] (1, 1). */
{BRANCH_WF, BRANCH_WB, 2, ENCODE_RELAX (1, 2)},
/* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
#undef BDAP_WF
#undef BDAP_WB
-
/* Target-specific multicharacter options, not const-declared at usage
in 2.9.1 and CVS of 2000-02-16. */
struct option md_longopts[] =
{
+#define OPTION_NO_US (OPTION_MD_BASE + 0)
+ {"no-underscore", no_argument, NULL, OPTION_NO_US},
+#define OPTION_US (OPTION_MD_BASE + 1)
+ {"underscore", no_argument, NULL, OPTION_US},
+#define OPTION_PIC (OPTION_MD_BASE + 2)
+ {"pic", no_argument, NULL, OPTION_PIC},
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
const char *md_shortopts = "hHN";
-
/* At first glance, this may seems wrong and should be 4 (ba + nop); but
since a short_jump must skip a *number* of long jumps, it must also be
a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
const int md_short_jump_size = 6;
const int md_long_jump_size = 6;
+/* Report output format. Small changes in output format (like elf
+ variants below) can happen until all options are parsed, but after
+ that, the output format must remain fixed. */
-/* Report output format. */
const char *
cris_target_format ()
{
return "a.out-cris";
case bfd_target_elf_flavour:
+ if (symbols_have_leading_underscore)
+ return "elf32-us-cris";
return "elf32-cris";
default:
or fr_var contributes to our returned value.
Although it may not be explicit in the frag, pretend
- fr_var starts with a value. */
+ fr_var starts with a value. */
int
md_estimate_size_before_relax (fragP, segment_type)
fragS *fragP;
/* The segment is either N_DATA or N_TEXT. */
- segT segment_type;
+ segT segment_type;
{
- int old_fr_fix;
+ int old_fr_fix;
old_fr_fix = fragP->fr_fix;
{
case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF):
if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
- {
- /* The symbol lies in the same segment - a relaxable case. */
- fragP->fr_subtype
- = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
- }
+ /* The symbol lies in the same segment - a relaxable case. */
+ fragP->fr_subtype
+ = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
else
- {
- /* Unknown or not the same segment, so not relaxable. */
- char *writep;
-
- /* A small branch-always (2 bytes) to the "real" branch
- instruction, plus a delay-slot nop (2 bytes), plus a
- jump (2 plus 4 bytes). See gen_cond_branch_32. */
- fragP->fr_fix += 2 + 2 + 2 + 4;
- writep = fragP->fr_literal + old_fr_fix;
- gen_cond_branch_32 (fragP->fr_opcode, writep, fragP,
- fragP->fr_symbol, (symbolS *)NULL,
- fragP->fr_offset);
- frag_wane (fragP);
- }
- break;
-
- case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
- case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
- /* We *might* give a better initial guess if we peek at offsets
- now, but the caller will relax correctly and without this, so
- don't bother. */
+ /* Unknown or not the same segment, so not relaxable. */
+ fragP->fr_subtype
+ = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD);
+ fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
break;
case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF):
value.
We could play tricks with managing a constant pool and make
- a_known_symbol_in_text a "bdap [pc + offset]" pointing there, but
- that's pointless, it can only be longer and slower.
-
- Off-topic: If PIC becomes *really* important, and has to be done
- in the assembler and linker only (which would be weird or
- clueless), we can so something. Imagine:
- move.x [r + 32_bit_symbol],r
- move.x [32_bit_symbol],r
- move.x 32_bit_symbol,r
- can be shortened by a word (8-bit offset) if we are close to the
- symbol or keep its length (16-bit offset) or be a word longer
- (32-bit offset). Then change the 32_bit_symbol into a "bdap [pc
- + offset]", and put the offset to the 32_bit_symbol in "offset".
- Weird, to say the least, and we still have to add support for a
- PC-relative relocation in the loader (shared libraries). But
- it's an interesting thought. */
+ a_known_symbol_in_text a "bdap [pc + offset]" pointing there
+ (like the GOT for ELF shared libraries), but that's no use, it
+ would in general be no shorter or faster code, only more
+ complicated. */
if (S_GET_SEGMENT (fragP->fr_symbol) != absolute_section)
{
/* Go for dword if not absolute or same segment. */
fragP->fr_subtype
= ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD);
- fragP->fr_var += 4;
+ fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
}
else
{
/* Modify the byte-offset BDAP into a word or dword offset
BDAP. Or really, a BDAP rX,8bit into a
- BDAP.[wd] rX,[PC+] followed by a and a word or dword. */
+ BDAP.[wd] rX,[PC+] followed by a word or dword. */
(fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16;
/* Keep the register number in the highest four bits. */
(fragP->fr_opcode)[1] &= 0xF0;
(fragP->fr_opcode)[1] |= BDAP_INCR_HIGH;
- /* It grew by two or four bytes. */
+ /* It grew by two or four bytes. */
fragP->fr_fix += 1 << pow2_of_size;
writep = fragP->fr_literal + old_fr_fix;
md_number_to_chars (writep, value, 1 << pow2_of_size);
}
break;
+ case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
+ case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
+ case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
+ case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
+ case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
+ case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
+ /* When relaxing a section for the second time, we don't need to
+ do anything except making sure that fr_var is set right. */
+ fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
+ break;
+
default:
BAD_CASE (fragP->fr_subtype);
}
return fragP->fr_var + (fragP->fr_fix - old_fr_fix);
}
-
/* Perform post-processing of machine-dependent frags after relaxation.
Called after relaxation is finished.
In: Address of frag.
segT sec ATTRIBUTE_UNUSED;
fragS *fragP;
{
- /* Pointer to first byte in variable-sized part of the frag. */
+ /* Pointer to first byte in variable-sized part of the frag. */
char *var_partp;
/* Pointer to first opcode byte in frag. */
opcodep = fragP->fr_opcode;
symbolP = fragP->fr_symbol;
- target_address
- = (symbolP
- ? S_GET_VALUE (symbolP) + symbol_get_frag(fragP->fr_symbol)->fr_address
- : 0 ) + fragP->fr_offset;
+ target_address = (symbolP ? S_GET_VALUE (symbolP) : 0) + fragP->fr_offset;
address_of_var_part = fragP->fr_address + var_part_offset;
switch (fragP->fr_subtype)
- {
- case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
- opcodep[0] = branch_disp ((target_address - address_of_var_part));
- var_part_size = 0;
- break;
-
- case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
- /* We had a quick immediate branch, now turn it into a word one i.e. a
- PC autoincrement. */
- opcodep[0] = BRANCH_PC_LOW;
- opcodep[1] &= 0xF0;
- opcodep[1] |= BRANCH_INCR_HIGH;
- md_number_to_chars (var_partp,
- (long) (target_address - (address_of_var_part + 2)),
- 2);
- var_part_size = 2;
- break;
-
- case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
- gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
- fragP->fr_symbol, (symbolS *)NULL,
- fragP->fr_offset);
- /* Ten bytes added: a branch, nop and a jump. */
- var_part_size = 2 + 2 + 4 + 2;
- break;
-
- case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
- var_partp[0] = target_address - (address_of_var_part + 1);
- var_part_size = 0;
- break;
-
- case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
- /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
- one that uses PC autoincrement. */
- opcodep[0] = BDAP_PC_LOW + (1 << 4);
- opcodep[1] &= 0xF0;
- opcodep[1] |= BDAP_INCR_HIGH;
- md_number_to_chars (var_partp, (long)(target_address), 2);
- var_part_size = 2;
- break;
-
- case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
- /* We had a BDAP 16-bit "word", change the offset to a dword. */
- opcodep[0] = BDAP_PC_LOW + (2 << 4);
- opcodep[1] &= 0xF0;
- opcodep[1] |= BDAP_INCR_HIGH;
- if (fragP->fr_symbol == NULL)
- md_number_to_chars (var_partp, fragP->fr_offset, 4);
- else
- fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
- fragP->fr_offset, 0, BFD_RELOC_32);
- var_part_size = 4;
- break;
-
- default:
- BAD_CASE (fragP->fr_subtype);
- break;
- }
+ {
+ case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
+ opcodep[0] = branch_disp ((target_address - address_of_var_part));
+ var_part_size = 0;
+ break;
- fragP->fr_fix += var_part_size;
+ case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
+ /* We had a quick immediate branch, now turn it into a word one i.e. a
+ PC autoincrement. */
+ opcodep[0] = BRANCH_PC_LOW;
+ opcodep[1] &= 0xF0;
+ opcodep[1] |= BRANCH_INCR_HIGH;
+ md_number_to_chars (var_partp,
+ (long) (target_address - (address_of_var_part + 2)),
+ 2);
+ var_part_size = 2;
+ break;
+
+ case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
+ gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
+ fragP->fr_symbol, (symbolS *) NULL,
+ fragP->fr_offset);
+ /* Ten bytes added: a branch, nop and a jump. */
+ var_part_size = 2 + 2 + 4 + 2;
+ break;
+
+ case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
+ var_partp[0] = target_address - (address_of_var_part + 1);
+ var_part_size = 0;
+ break;
+
+ case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
+ /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
+ one that uses PC autoincrement. */
+ opcodep[0] = BDAP_PC_LOW + (1 << 4);
+ opcodep[1] &= 0xF0;
+ opcodep[1] |= BDAP_INCR_HIGH;
+ md_number_to_chars (var_partp, (long) (target_address), 2);
+ var_part_size = 2;
+ break;
+ case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
+ /* We had a BDAP 16-bit "word", change the offset to a dword. */
+ opcodep[0] = BDAP_PC_LOW + (2 << 4);
+ opcodep[1] &= 0xF0;
+ opcodep[1] |= BDAP_INCR_HIGH;
+ if (fragP->fr_symbol == NULL)
+ md_number_to_chars (var_partp, fragP->fr_offset, 4);
+ else
+ fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
+ fragP->fr_offset, 0, BFD_RELOC_32);
+ var_part_size = 4;
+ break;
+
+ default:
+ BAD_CASE (fragP->fr_subtype);
+ break;
+ }
+
+ fragP->fr_fix += var_part_size;
}
/* Generate a short jump around a secondary jump table.
This used to be md_create_short_jump, but is now called from
md_create_long_jump instead, when sufficient.
since the sizes of the jumps are the same. It used to be brittle,
- making possibilities for creating bad code. */
+ making possibilities for creating bad code. */
static void
cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol)
if (-254 <= distance && distance <= 256)
{
/* Create a "short" short jump: "BA distance - 2". */
- storep[0] = branch_disp (distance-2);
+ storep[0] = branch_disp (distance - 2);
storep[1] = BA_QUICK_HIGH;
/* A nop for the delay slot. */
- md_number_to_chars (storep+2, NOP_OPCODE, 2);
+ md_number_to_chars (storep + 2, NOP_OPCODE, 2);
/* The extra word should be filled with something sane too. Make it
a nop to keep disassembly sane. */
- md_number_to_chars (storep+4, NOP_OPCODE, 2);
+ md_number_to_chars (storep + 4, NOP_OPCODE, 2);
}
else
{
/* Make it a "long" short jump: "BA (PC+)". */
md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2);
- /* ".WORD distance - 4". */
+ /* ".WORD distance - 4". */
md_number_to_chars (storep + 2, (long) (distance - 4), 2);
/* A nop for the delay slot. */
- md_number_to_chars (storep+4, NOP_OPCODE, 2);
+ md_number_to_chars (storep + 4, NOP_OPCODE, 2);
}
}
-
/* Generate a long jump in a secondary jump table.
storep Where to store the jump instruction.
}
else
{
- /* We have a "long" long jump: "JUMP (PC+)". */
- md_number_to_chars (storep, JUMP_PC_INCR_OPCODE, 2);
+ /* We have a "long" long jump: "JUMP [PC+]".
+ Make it an "ADD [PC+],PC" if we're supposed to emit PIC code. */
+ md_number_to_chars (storep,
+ pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2);
- /* Follow with a ".DWORD to_addr". */
+ /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol,
- 0, 0, BFD_RELOC_32);
+ 0, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32);
}
}
+/* Allocate space for the first piece of an insn, and mark it as the
+ start of the insn for debug-format use. */
+
+static char *
+cris_insn_first_word_frag ()
+{
+ char *insnp = frag_more (2);
+
+ /* We need to mark the start of the insn by passing dwarf2_emit_insn
+ the offset from the current fragment position. This must be done
+ after the first fragment is created but before any other fragments
+ (fixed or varying) are created. Note that the offset only
+ corresponds to the "size" of the insn for a fixed-size,
+ non-expanded insn. */
+ if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
+ dwarf2_emit_insn (2);
+
+ return insnp;
+}
/* Port-specific assembler initialization. */
+
void
md_begin ()
{
const char *hashret = NULL;
int i = 0;
- /* Set up a hash table for the instructions. */
+ /* Set up a hash table for the instructions. */
op_hash = hash_new ();
if (op_hash == NULL)
as_fatal (_("Virtual memory exhausted"));
if (hashret != NULL && *hashret != '\0')
as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name,
- *hashret == 0 ? _("(unknown reason)") : hashret);
+ *hashret == 0 ? _("(unknown reason)") : hashret);
do
{
if (cris_opcodes[i].match & cris_opcodes[i].lose)
cris_opcodes[i].args);
++i;
- } while (cris_opcodes[i].name != NULL
- && strcmp (cris_opcodes[i].name, name) == 0);
+ }
+ while (cris_opcodes[i].name != NULL
+ && strcmp (cris_opcodes[i].name, name) == 0);
}
}
-
/* Assemble a source line. */
+
void
md_assemble (str)
char *str;
/* When the expression is unknown for a BDAP, it can need 0, 2 or 4
extra bytes, so we handle it separately. */
case PREFIX_BDAP_IMM:
- gen_bdap (prefix.base_reg_number, &prefix.expr);
- break;
-
+ /* We only do it if the relocation is unspecified, i.e. not a PIC
+ relocation. */
+ if (prefix.reloc == BFD_RELOC_NONE)
+ {
+ gen_bdap (prefix.base_reg_number, &prefix.expr);
+ break;
+ }
+ /* Fall through. */
case PREFIX_BDAP:
case PREFIX_BIAP:
case PREFIX_DIP:
- opcodep = frag_more (2);
+ opcodep = cris_insn_first_word_frag ();
/* Output the prefix opcode. */
md_number_to_chars (opcodep, (long) prefix.opcode, 2);
- /* This only happens for DIP, but is ok for the others as they have
- no reloc. */
+ /* Having a specified reloc only happens for DIP and for BDAP with
+ PIC operands, but it is ok to drop through here for the other
+ prefixes as they can have no relocs specified. */
if (prefix.reloc != BFD_RELOC_NONE)
{
- /* Output an absolute mode address. */
- p = frag_more (4);
- fix_new_exp (frag_now, (p - frag_now->fr_literal), 4,
+ unsigned int relocsize
+ = (prefix.kind == PREFIX_DIP
+ ? 4 : cris_get_pic_reloc_size (prefix.reloc));
+
+ p = frag_more (relocsize);
+ fix_new_exp (frag_now, (p - frag_now->fr_literal), relocsize,
&prefix.expr, 0, prefix.reloc);
}
break;
case PREFIX_PUSH:
- opcodep = frag_more (2);
+ opcodep = cris_insn_first_word_frag ();
/* Output the prefix opcode. Being a "push", we add the negative
size of the register to "sp". */
if (output_instruction.spec_reg != NULL)
{
- /* Special register. */
+ /* Special register. */
opcodep[0] = -output_instruction.spec_reg->reg_size;
}
else
{
- /* General register. */
+ /* General register. */
opcodep[0] = -4;
}
opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8);
return;
/* Done with the prefix. Continue with the main instruction. */
- opcodep = frag_more (2);
+ if (prefix.kind == PREFIX_NONE)
+ opcodep = cris_insn_first_word_frag ();
+ else
+ opcodep = frag_more (2);
/* Output the instruction opcode. */
- md_number_to_chars (opcodep, (long)(output_instruction.opcode), 2);
+ md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2);
/* Output the symbol-dependent instruction stuff. */
if (output_instruction.insn_type == CRIS_INSN_BRANCH)
if (output_instruction.expr.X_op == O_constant
|| to_seg == now_seg || is_undefined)
{
+ /* Handle complex expressions. */
+ valueT addvalue
+ = (output_instruction.expr.X_op_symbol != NULL
+ ? 0 : output_instruction.expr.X_add_number);
+ symbolS *sym
+ = (output_instruction.expr.X_op_symbol != NULL
+ ? make_expr_symbol (&output_instruction.expr)
+ : output_instruction.expr.X_add_symbol);
+
/* If is_undefined, then the expression may BECOME now_seg. */
- length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
+ length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
/* Make room for max ten bytes of variable length. */
frag_var (rs_machine_dependent, 10, 0,
ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code),
- output_instruction.expr.X_add_symbol,
- output_instruction.expr.X_add_number,
- opcodep);
+ sym, addvalue, opcodep);
}
else
{
This means it is a branch to a known symbol in another
section. Code in data? Weird but valid. Emit a 32-bit
branch. */
- gen_cond_branch_32 (opcodep, frag_more (10), frag_now,
+ char *cond_jump = frag_more (10);
+
+ gen_cond_branch_32 (opcodep, cond_jump, frag_now,
output_instruction.expr.X_add_symbol,
- (symbolS *)NULL,
+ (symbolS *) NULL,
output_instruction.expr.X_add_number);
}
}
if (output_instruction.imm_oprnd_size > 0)
{
/* The intruction has an immediate operand. */
- enum bfd_reloc_code_real reloc = 0;
+ enum bfd_reloc_code_real reloc = BFD_RELOC_NONE;
switch (output_instruction.imm_oprnd_size)
{
correctly. */
case 2:
- reloc = BFD_RELOC_16;
+ /* Note that size-check for the explicit reloc has already
+ been done when we get here. */
+ if (output_instruction.reloc != BFD_RELOC_NONE)
+ reloc = output_instruction.reloc;
+ else
+ reloc = BFD_RELOC_16;
break;
case 4:
- reloc = BFD_RELOC_32;
+ /* Allow a relocation specified in the operand. */
+ if (output_instruction.reloc != BFD_RELOC_NONE)
+ reloc = output_instruction.reloc;
+ else
+ reloc = BFD_RELOC_32;
break;
default:
else if (output_instruction.reloc != BFD_RELOC_NONE)
{
/* An immediate operand that has a relocation and needs to be
- processed further. */
+ processed further. */
/* It is important to use fix_new_exp here and everywhere else
(and not fix_new), as fix_new_exp can handle "difference
}
}
-
/* Low level text-to-bits assembly. */
+
static void
cris_process_instruction (insn_text, out_insnp, prefixp)
char *insn_text;
- struct cris_instruction *out_insnp;
+ struct cris_instruction *out_insnp;
struct cris_prefix *prefixp;
{
- char *s;
- char modified_char = 0;
- const char *args;
+ char *s;
+ char modified_char = 0;
+ const char *args;
struct cris_opcode *instruction;
- char *operands;
- int match = 0;
- int mode;
- int regno;
- int size_bits;
+ char *operands;
+ int match = 0;
+ int mode;
+ int regno;
+ int size_bits;
/* Reset these fields to a harmless state in case we need to return in
error. */
/* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
that the caller has translated the opcode to lower-case, up to the
- first non-letter. */
- for (operands = insn_text;
- islower (*operands);
- ++operands)
+ first non-letter. */
+ for (operands = insn_text; ISLOWER (*operands); ++operands)
;
/* Terminate the opcode after letters, but save the character there if
break;
case '.':
- /* Put back the modified character later */
+ /* Put back the modified character later. */
modified_char = *operands;
- /* FALLTHROUGH. */
+ /* Fall through. */
case ' ':
- /* Consume the character after the mnemonic and replace */
- /* it with '\0'. */
+ /* Consume the character after the mnemonic
+ and replace it with '\0'. */
*operands++ = '\0';
break;
*--operands = modified_char;
}
-
/* Try to match an opcode table slot. */
- for (s = operands;
- ;
- )
+ for (s = operands;;)
{
- int imm_expr_found;
+ int imm_expr_found;
/* Initialize *prefixp, perhaps after being modified for a
- "near match". */
+ "near match". */
prefixp->kind = PREFIX_NONE;
prefixp->reloc = BFD_RELOC_NONE;
/* Build the opcode, checking as we go to make sure that the
operands match. */
- for (args = instruction->args;
- ;
- ++args)
+ for (args = instruction->args;; ++args)
{
switch (*args)
{
case 'B':
/* This is not really an operand, but causes a "BDAP
- -size,SP" prefix to be output, for PUSH instructions. */
+ -size,SP" prefix to be output, for PUSH instructions. */
prefixp->kind = PREFIX_PUSH;
continue;
if (! get_flags (&s, &flags))
break;
- out_insnp->opcode
- |= ((flags & 0xf0) << 8) | (flags & 0xf);
+ out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf);
continue;
}
break;
/* Since 'O' is used with an explicit bdap, we have no
- "real" instruction. */
+ "real" instruction. */
prefixp->kind = PREFIX_BDAP_IMM;
+ prefixp->opcode
+ = BDAP_QUICK_OPCODE | (prefixp->base_reg_number << 12);
+
out_insnp->insn_type = CRIS_INSN_NONE;
continue;
}
/* This character is used in the disassembler to
recognize a prefix instruction to fold into the
addressing mode for the next instruction. It is
- ignored here. */
+ ignored here. */
continue;
case 'R':
out_insnp->opcode |= (AUTOINCR_BIT << 8);
}
else
- /* No prefix. The "mode" variable contains bits like
- whether or not this is autoincrement mode. */
- out_insnp->opcode |= (mode << 10);
+ {
+ /* No prefix. The "mode" variable contains bits like
+ whether or not this is autoincrement mode. */
+ out_insnp->opcode |= (mode << 10);
+
+ /* If there was a PIC reloc specifier, then it was
+ attached to the prefix. Note that we can't check
+ that the reloc size matches, since we don't have
+ all the operands yet in all cases. */
+ if (prefixp->reloc != BFD_RELOC_NONE)
+ out_insnp->reloc = prefixp->reloc;
+ }
out_insnp->opcode |= regno /* << 0 */ ;
continue;
break;
else
{
- out_insnp->opcode |=
- (regno << 12) | (size_bits << 4);
+ out_insnp->opcode |= (regno << 12) | (size_bits << 4);
continue;
}
prefix.
The difference to 's' is that this does not allow an
- "immediate" expression. */
+ "immediate" expression. */
if (! get_autoinc_prefix_or_indir_op (&s, prefixp,
&mode, ®no,
&imm_expr_found,
{
/* There was an immediate mode operand, so we must check
that it has an appropriate size. */
-
switch (instruction->imm_oprnd_size)
{
default:
|| out_insnp->expr.X_add_number > 255))
as_bad (_("Immediate value not in 8 bit range: %ld"),
out_insnp->expr.X_add_number);
- /* FALLTHROUGH. */
+ /* Fall through. */
case 2:
/* FIXME: We need an indicator in the instruction
table to pass on, to indicate if we need to check
|| out_insnp->expr.X_add_number > 255))
as_bad (_("Immediate value not in 8 bit range: %ld"),
out_insnp->expr.X_add_number);
- /* FALLTHROUGH. */
+ /* Fall through. */
case 1:
if (out_insnp->expr.X_op == O_constant
&& (out_insnp->expr.X_add_number < -32768
BAD_CASE (out_insnp->spec_reg->reg_size);
}
}
+
+ /* If there was a relocation specified for the immediate
+ expression (i.e. it had a PIC modifier) check that the
+ size of the PIC relocation matches the size specified by
+ the opcode. */
+ if (out_insnp->reloc != BFD_RELOC_NONE
+ && (cris_get_pic_reloc_size (out_insnp->reloc)
+ != (unsigned int) out_insnp->imm_oprnd_size))
+ as_bad (_("PIC relocation size does not match operand size"));
}
}
break;
}
}
-
/* Get a B, W, or D size modifier from the string pointed out by *cPP,
which must point to a '.' in front of the modifier. On successful
return, *cPP is advanced to the character following the size
return 0;
else
{
- /* Consume the '.' */
+ /* Consume the '.'. */
(*cPP)++;
switch (**cPP)
}
}
-
/* Get a B or W size modifier from the string pointed out by *cPP,
which must point to a '.' in front of the modifier. On successful
return, *cPP is advanced to the character following the size
return 0;
else
{
- /* Consume the '.' */
+ /* Consume the '.'. */
(*cPP)++;
switch (**cPP)
}
}
-
-/* Get a general register from the string pointed out by *cPP. The
+/* Get a general register from the string pointed out by *cPP. The
variable *cPP is advanced to the character following the general
register name on a successful return, and has its initial position
otherwise.
char *oldp;
oldp = *cPP;
+ /* Handle a sometimes-mandatory dollar sign as register prefix. */
+ if (**cPP == REGISTER_PREFIX_CHAR)
+ (*cPP)++;
+ else if (demand_register_prefix)
+ return 0;
+
switch (**cPP)
{
case 'P':
(*cPP)++;
if ((**cPP == 'C' || **cPP == 'c')
- && ! isalnum ((*cPP)[1]))
+ && ! ISALNUM ((*cPP)[1]))
{
/* It's "PC": consume the "c" and we're done. */
(*cPP)++;
case 'R':
case 'r':
- /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r' */
+ /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
(*cPP)++;
- if (isdigit (**cPP))
+ if (ISDIGIT (**cPP))
{
/* It's r[0-9]. Consume and check the next digit. */
*regnop = **cPP - '0';
(*cPP)++;
- if (! isalnum (**cPP))
+ if (! ISALNUM (**cPP))
{
- /* No more digits, we're done. */
+ /* No more digits, we're done. */
return 1;
}
else
{
/* One more digit. Consume and add. */
- *regnop = *regnop*10 + (**cPP - '0');
+ *regnop = *regnop * 10 + (**cPP - '0');
/* We need to check for a valid register number; Rn,
0 <= n <= MAX_REG. */
return 0;
}
-
/* Get a special register from the string pointed out by *cPP. The
variable *cPP is advanced to the character following the special
register name if one is found, and retains its original position
{
char *s1;
const char *s2;
+ char *name_begin = *cPP;
const struct cris_spec_reg *sregp;
+ /* Handle a sometimes-mandatory dollar sign as register prefix. */
+ if (*name_begin == REGISTER_PREFIX_CHAR)
+ name_begin++;
+ else if (demand_register_prefix)
+ return 0;
+
/* Loop over all special registers. */
- for (sregp = cris_spec_regs;
- sregp->name != NULL;
- sregp++)
+ for (sregp = cris_spec_regs; sregp->name != NULL; sregp++)
{
-
/* Start over from beginning of the supposed name. */
- s1 = *cPP;
+ s1 = name_begin;
s2 = sregp->name;
- while (*s2 != '\0'
- && (isupper (*s1) ? tolower (*s1) == *s2 : *s1 == *s2))
+ while (*s2 != '\0' && TOLOWER (*s1) == *s2)
{
s1++;
s2++;
/* For a match, we must have consumed the name in the table, and we
must be outside what could be part of a name. Assume here that a
- test for alphanumerics is sufficient for a name test. */
- if (*s2 == 0 && ! isalnum (*s1))
+ test for alphanumerics is sufficient for a name test. */
+ if (*s2 == 0 && ! ISALNUM (*s1))
{
- /* We have a match. Update the pointer and be done. */
+ /* We have a match. Update the pointer and be done. */
*cPP = s1;
*sregpp = sregp;
return 1;
}
}
- /* If we got here, we did not find any name. */
+ /* If we got here, we did not find any name. */
return 0;
}
-
/* Get an unprefixed or side-effect-prefix operand from the string pointed
out by *cPP. The pointer *cPP is advanced to the character following
the indirect operand if we have success, else it contains an undefined
static int
get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
imm_foundp, imm_exprP)
- char **cPP;
- struct cris_prefix *prefixp;
- int *is_autoincp;
- int *src_regnop;
- int *imm_foundp;
- expressionS *imm_exprP;
+ char **cPP;
+ struct cris_prefix *prefixp;
+ int *is_autoincp;
+ int *src_regnop;
+ int *imm_foundp;
+ expressionS *imm_exprP;
{
/* Assume there was no immediate mode expression. */
*imm_foundp = 0;
/* It wasn't an indirection. Check if it's a
register. */
else if (get_gen_reg (cPP, &index_reg_number))
- {
- int size_bits;
-
- /* Indexed with assign mode: "[rN+rM.S]". */
- prefixp->kind = PREFIX_BIAP;
- prefixp->opcode
- = (BIAP_OPCODE + (index_reg_number << 12)
- + prefixp->base_reg_number /* << 0 */);
-
- if (! get_bwd_size_modifier (cPP, &size_bits))
- /* Size missing, this isn't a match. */
- return 0;
- else
- {
- /* Size found, break out to check the
- final ']'. */
- prefixp->opcode |= size_bits << 4;
- break;
- }
- }
- /* Not a register. Then this must be "[rN+I]". */
- else if (cris_get_expression (cPP, &prefixp->expr))
+ {
+ int size_bits;
+
+ /* Indexed with assign mode: "[rN+rM.S]". */
+ prefixp->kind = PREFIX_BIAP;
+ prefixp->opcode
+ = (BIAP_OPCODE + (index_reg_number << 12)
+ + prefixp->base_reg_number /* << 0 */);
+
+ if (! get_bwd_size_modifier (cPP, &size_bits))
+ /* Size missing, this isn't a match. */
+ return 0;
+ else
{
- /* We've got offset with assign mode. Fill
- in the blanks and break out to match the
+ /* Size found, break out to check the
final ']'. */
- prefixp->kind = PREFIX_BDAP_IMM;
+ prefixp->opcode |= size_bits << 4;
break;
}
- else
- /* Neither register nor expression found, so
- this can't be a match. */
- return 0;
+ }
+ /* Not a register. Then this must be "[rN+I]". */
+ else if (cris_get_expression (cPP, &prefixp->expr))
+ {
+ /* We've got offset with assign mode. Fill
+ in the blanks and break out to match the
+ final ']'. */
+ prefixp->kind = PREFIX_BDAP_IMM;
+
+ /* We tentatively put an opcode corresponding to
+ a 32-bit operand here, although it may be
+ relaxed when there's no PIC specifier for the
+ operand. */
+ prefixp->opcode
+ = (BDAP_INDIR_OPCODE
+ | (prefixp->base_reg_number << 12)
+ | (AUTOINCR_BIT << 8)
+ | (2 << 4)
+ | REG_PC /* << 0 */);
+
+ /* This can have a PIC suffix, specifying reloc
+ type to use. */
+ if (pic && **cPP == PIC_SUFFIX_CHAR)
+ {
+ unsigned int relocsize;
+
+ cris_get_pic_suffix (cPP, &prefixp->reloc,
+ &prefixp->expr);
+
+ /* Tweak the size of the immediate operand
+ in the prefix opcode if it isn't what we
+ set. */
+ relocsize
+ = cris_get_pic_reloc_size (prefixp->reloc);
+ if (relocsize != 4)
+ prefixp->opcode
+ = ((prefixp->opcode & ~(3 << 4))
+ | ((relocsize >> 1) << 4));
+ }
+ break;
+ }
+ else
+ /* Neither register nor expression found, so
+ this can't be a match. */
+ return 0;
}
- /* Not "[rN+" but perhaps "[rN-"? */
+ /* Not "[rN+" but perhaps "[rN-"? */
else if (**cPP == '-')
- {
- /* We must have an offset with assign mode. */
- if (! cris_get_expression (cPP, &prefixp->expr))
- /* No expression, no match. */
- return 0;
- else
- {
- /* We've got offset with assign mode. Fill
- in the blanks and break out to match the
- final ']'. */
- prefixp->kind = PREFIX_BDAP_IMM;
- break;
- }
- }
- else
- /* Neither '+' nor '-' after "[rN=rM". Lose. */
- return 0;
+ {
+ /* We must have an offset with assign mode. */
+ if (! cris_get_expression (cPP, &prefixp->expr))
+ /* No expression, no match. */
+ return 0;
+ else
+ {
+ /* We've got offset with assign mode. Fill
+ in the blanks and break out to match the
+ final ']'.
+
+ Note that we don't allow a PIC suffix for an
+ operand with a minus sign. */
+ prefixp->kind = PREFIX_BDAP_IMM;
+ break;
+ }
+ }
+ else
+ /* Neither '+' nor '-' after "[rN=rM". Lose. */
+ return 0;
}
default:
/* Neither ']' nor '+' nor '=' after "[rN". Lose. */
return 1;
}
}
- /* No indirection. Perhaps a constant? */
+ /* No indirection. Perhaps a constant? */
else if (cris_get_expression (cPP, imm_exprP))
- {
- /* Expression found, this is immediate mode. */
- prefixp->kind = PREFIX_NONE;
- *is_autoincp = 1;
- *src_regnop = REG_PC;
- *imm_foundp = 1;
- return 1;
- }
+ {
+ /* Expression found, this is immediate mode. */
+ prefixp->kind = PREFIX_NONE;
+ *is_autoincp = 1;
+ *src_regnop = REG_PC;
+ *imm_foundp = 1;
+
+ /* This can have a PIC suffix, specifying reloc type to use. The
+ caller must check that the reloc size matches the operand size. */
+ if (pic && **cPP == PIC_SUFFIX_CHAR)
+ cris_get_pic_suffix (cPP, &prefixp->reloc, imm_exprP);
+
+ return 1;
+ }
/* No luck today. */
return 0;
}
-
/* This function gets an indirect operand in a three-address operand
combination from the string pointed out by *cPP. The pointer *cPP is
advanced to the character following the indirect operand on success, or
/* We must have a '[' or it's a clean failure. */
return 0;
- /* Eat the first '['. */
+ /* Eat the first '['. */
+ (*cPP)++;
+
+ if (**cPP == '[')
+ {
+ /* A second '[', so this must be double-indirect mode. */
(*cPP)++;
+ prefixp->kind = PREFIX_DIP;
+ prefixp->opcode = DIP_OPCODE;
- if (**cPP == '[')
+ /* Get the register or fail entirely. */
+ if (! get_gen_reg (cPP, ®_number))
+ return 0;
+ else
+ {
+ prefixp->opcode |= reg_number /* << 0 */ ;
+ if (**cPP == '+')
+ {
+ /* Since we found a '+', this must be double-indirect
+ autoincrement mode. */
+ (*cPP)++;
+ prefixp->opcode |= AUTOINCR_BIT << 8;
+ }
+
+ /* There's nothing particular to do, if this was a
+ double-indirect *without* autoincrement. */
+ }
+
+ /* Check the first ']'. The second one is checked at the end. */
+ if (**cPP != ']')
+ return 0;
+
+ /* Eat the first ']', so we'll be looking at a second ']'. */
+ (*cPP)++;
+ }
+ /* No second '['. Then we should have a register here, making
+ it "[rN". */
+ else if (get_gen_reg (cPP, &prefixp->base_reg_number))
+ {
+ /* This must be indexed or offset mode: "[rN+I]" or
+ "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
+ if (**cPP == '+')
{
- /* A second '[', so this must be double-indirect mode. */
+ int index_reg_number;
+
(*cPP)++;
- prefixp->kind = PREFIX_DIP;
- prefixp->opcode = DIP_OPCODE;
- /* Get the register or fail entirely. */
- if (! get_gen_reg (cPP, ®_number))
- return 0;
- else
+ if (**cPP == '[')
{
- prefixp->opcode |= reg_number /* << 0 */ ;
+ /* This is "[rx+["... Expect a register next. */
+ int size_bits;
+ (*cPP)++;
+
+ if (!get_gen_reg (cPP, &index_reg_number))
+ return 0;
+
+ prefixp->kind = PREFIX_BDAP;
+ prefixp->opcode
+ = (BDAP_INDIR_OPCODE
+ + (prefixp->base_reg_number << 12)
+ + index_reg_number);
+
+ /* We've seen "[rx+[ry", so check if this is
+ autoincrement. */
if (**cPP == '+')
{
- /* Since we found a '+', this must be double-indirect
- autoincrement mode. */
+ /* Yep, now at "[rx+[ry+". */
(*cPP)++;
prefixp->opcode |= AUTOINCR_BIT << 8;
}
+ /* If it wasn't autoincrement, we don't need to
+ add anything. */
- /* There's nothing particular to do, if this was a
- double-indirect *without* autoincrement. */
- }
-
- /* Check the first ']'. The second one is checked at the end. */
- if (**cPP != ']')
- return 0;
+ /* Check a first closing ']': "[rx+[ry]" or
+ "[rx+[ry+]". */
+ if (**cPP != ']')
+ return 0;
+ (*cPP)++;
- /* Eat the first ']', so we'll be looking at a second ']'. */
- (*cPP)++;
- }
- /* No second '['. Then we should have a register here, making
- it "[rN". */
- else if (get_gen_reg (cPP, &prefixp->base_reg_number))
- {
- /* This must be indexed or offset mode: "[rN+I]" or
- "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
- if (**cPP == '+')
- {
- /* Not the first alternative, must be one of the last
- three. */
- int index_reg_number;
+ /* Now expect a size modifier ".S". */
+ if (! get_bwd_size_modifier (cPP, &size_bits))
+ return 0;
- (*cPP)++;
+ prefixp->opcode |= size_bits << 4;
- if (**cPP == '[')
- {
- /* This is "[rx+["... Expect a register next. */
- int size_bits;
- (*cPP)++;
+ /* Ok, all interesting stuff has been seen:
+ "[rx+[ry+].S" or "[rx+[ry].S". We only need to
+ expect a final ']', which we'll do in a common
+ closing session. */
+ }
+ /* Seen "[rN+", but not a '[', so check if we have a
+ register. */
+ else if (get_gen_reg (cPP, &index_reg_number))
+ {
+ /* This is indexed mode: "[rN+rM.S]" or
+ "[rN+rM.S+]". */
+ int size_bits;
+ prefixp->kind = PREFIX_BIAP;
+ prefixp->opcode
+ = (BIAP_OPCODE
+ | prefixp->base_reg_number /* << 0 */
+ | (index_reg_number << 12));
+
+ /* Consume the ".S". */
+ if (! get_bwd_size_modifier (cPP, &size_bits))
+ /* Missing size, so fail. */
+ return 0;
+ else
+ /* Size found. Add that piece and drop down to
+ the common checking of the closing ']'. */
+ prefixp->opcode |= size_bits << 4;
+ }
+ /* Seen "[rN+", but not a '[' or a register, so then
+ it must be a constant "I". */
+ else if (cris_get_expression (cPP, &prefixp->expr))
+ {
+ /* Expression found, so fill in the bits of offset
+ mode and drop down to check the closing ']'. */
+ prefixp->kind = PREFIX_BDAP_IMM;
+
+ /* We tentatively put an opcode corresponding to a 32-bit
+ operand here, although it may be relaxed when there's no
+ PIC specifier for the operand. */
+ prefixp->opcode
+ = (BDAP_INDIR_OPCODE
+ | (prefixp->base_reg_number << 12)
+ | (AUTOINCR_BIT << 8)
+ | (2 << 4)
+ | REG_PC /* << 0 */);
+
+ /* This can have a PIC suffix, specifying reloc type to use. */
+ if (pic && **cPP == PIC_SUFFIX_CHAR)
+ {
+ unsigned int relocsize;
- if (!get_gen_reg (cPP, &index_reg_number))
- return 0;
+ cris_get_pic_suffix (cPP, &prefixp->reloc, &prefixp->expr);
- prefixp->kind = PREFIX_BDAP;
+ /* Tweak the size of the immediate operand in the prefix
+ opcode if it isn't what we set. */
+ relocsize = cris_get_pic_reloc_size (prefixp->reloc);
+ if (relocsize != 4)
prefixp->opcode
- = (BDAP_INDIR_OPCODE
- + (prefixp->base_reg_number << 12)
- + index_reg_number);
-
- /* We've seen "[rx+[ry", so check if this is
- autoincrement. */
- if (**cPP == '+')
- {
- /* Yep, now at "[rx+[ry+". */
- (*cPP)++;
- prefixp->opcode |= AUTOINCR_BIT << 8;
- }
- /* If it wasn't autoincrement, we don't need to
- add anything. */
-
- /* Check a first closing ']': "[rx+[ry]" or
- "[rx+[ry+]". */
- if (**cPP != ']')
- return 0;
- (*cPP)++;
-
- /* Now expect a size modifier ".S". */
- if (! get_bwd_size_modifier (cPP, &size_bits))
- return 0;
-
- prefixp->opcode |= size_bits << 4;
-
- /* Ok, all interesting stuff has been seen:
- "[rx+[ry+].S" or "[rx+[ry].S". We only need to
- expect a final ']', which we'll do in a common
- closing session. */
- }
- /* Seen "[rN+", but not a '[', so check if we have a
- register. */
- else if (get_gen_reg (cPP, &index_reg_number))
- {
- /* This is indexed mode: "[rN+rM.S]" or
- "[rN+rM.S+]". */
- int size_bits;
- prefixp->kind = PREFIX_BIAP;
- prefixp->opcode
- = (BIAP_OPCODE
- | prefixp->base_reg_number /* << 0 */
- | (index_reg_number << 12));
-
- /* */
- if (! get_bwd_size_modifier (cPP, &size_bits))
- /* Missing size, so fail. */
- return 0;
- else
- /* Size found. Add that piece and drop down to
- the common checking of the closing ']'. */
- prefixp->opcode |= size_bits << 4;
- }
- /* Seen "[rN+", but not a '[' or a register, so then
- it must be a constant "I". */
- else if (cris_get_expression (cPP, &prefixp->expr))
- {
- /* Expression found, so fill in the bits of offset
- mode and drop down to check the closing ']'. */
- prefixp->kind = PREFIX_BDAP_IMM;
- }
- else
- /* Nothing valid here: lose. */
- return 0;
- }
- /* Seen "[rN" but no '+', so check if it's a '-'. */
- else if (**cPP == '-')
- {
- /* Yep, we must have offset mode. */
- if (! cris_get_expression (cPP, &prefixp->expr))
- /* No expression, so we lose. */
- return 0;
- else
- {
- /* Expression found to make this offset mode, so
- fill those bits and drop down to check the
- closing ']'. */
- prefixp->kind = PREFIX_BDAP_IMM;
- }
+ = ((prefixp->opcode & ~(3 << 4))
+ | ((relocsize >> 1) << 4));
}
- else
- {
- /* We've seen "[rN", but not '+' or '-'; rather a ']'.
- Hmm. Normally this is a simple indirect mode that we
- shouldn't match, but if we expect ']', then we have a
- zero offset, so it can be a three-address-operand,
- like "[rN],rO,rP", thus offset mode.
-
- Don't eat the ']', that will be done in the closing
- ceremony. */
- prefixp->expr.X_op = O_constant;
- prefixp->expr.X_add_number = 0;
- prefixp->expr.X_add_symbol = NULL;
- prefixp->expr.X_op_symbol = NULL;
- prefixp->kind = PREFIX_BDAP_IMM;
- }
- }
- /* A '[', but no second '[', and no register. Check if we
- have an expression, making this "[I]" for a double-indirect
- prefix. */
- else if (cris_get_expression (cPP, &prefixp->expr))
- {
- /* Expression found, the so called absolute mode for a
- double-indirect prefix on PC. */
- prefixp->kind = PREFIX_DIP;
- prefixp->opcode
- = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
- prefixp->reloc = BFD_RELOC_32;
- }
- else
- /* Neither '[' nor register nor expression. We lose. */
- return 0;
+ }
+ else
+ /* Nothing valid here: lose. */
+ return 0;
+ }
+ /* Seen "[rN" but no '+', so check if it's a '-'. */
+ else if (**cPP == '-')
+ {
+ /* Yep, we must have offset mode. */
+ if (! cris_get_expression (cPP, &prefixp->expr))
+ /* No expression, so we lose. */
+ return 0;
+ else
+ {
+ /* Expression found to make this offset mode, so
+ fill those bits and drop down to check the
+ closing ']'.
+
+ Note that we don't allow a PIC suffix for
+ an operand with a minus sign like this. */
+ prefixp->kind = PREFIX_BDAP_IMM;
+ }
+ }
+ else
+ {
+ /* We've seen "[rN", but not '+' or '-'; rather a ']'.
+ Hmm. Normally this is a simple indirect mode that we
+ shouldn't match, but if we expect ']', then we have a
+ zero offset, so it can be a three-address-operand,
+ like "[rN],rO,rP", thus offset mode.
+
+ Don't eat the ']', that will be done in the closing
+ ceremony. */
+ prefixp->expr.X_op = O_constant;
+ prefixp->expr.X_add_number = 0;
+ prefixp->expr.X_add_symbol = NULL;
+ prefixp->expr.X_op_symbol = NULL;
+ prefixp->kind = PREFIX_BDAP_IMM;
+ }
+ }
+ /* A '[', but no second '[', and no register. Check if we
+ have an expression, making this "[I]" for a double-indirect
+ prefix. */
+ else if (cris_get_expression (cPP, &prefixp->expr))
+ {
+ /* Expression found, the so called absolute mode for a
+ double-indirect prefix on PC. */
+ prefixp->kind = PREFIX_DIP;
+ prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
+ prefixp->reloc = BFD_RELOC_32;
+ }
+ else
+ /* Neither '[' nor register nor expression. We lose. */
+ return 0;
/* We get here as a closing ceremony to a successful match. We just
need to check the closing ']'. */
return 1;
}
-
/* Get an expression from the string pointed out by *cPP.
The pointer *cPP is advanced to the character following the expression
on a success, or retains its original value otherwise.
exprP Pointer to structure containing the expression.
- Return 1 iff a correct expression is found. */
+ Return 1 iff a correct expression is found. */
static int
cris_get_expression (cPP, exprP)
- char **cPP;
- expressionS *exprP;
+ char **cPP;
+ expressionS *exprP;
{
char *saved_input_line_pointer;
segT exp;
return 1;
}
-
/* Get a sequence of flag characters from *spp. The pointer *cPP is
advanced to the character following the expression. The flag
characters are consecutive, no commas or spaces.
default:
/* We consider this successful if we stop at a comma or
- whitespace. Anything else, and we consider it a failure. */
+ whitespace. Anything else, and we consider it a failure. */
if (**cPP != ','
&& **cPP != 0
- && ! isspace (**cPP))
+ && ! ISSPACE (**cPP))
return 0;
else
return 1;
}
}
-
/* Generate code and fixes for a BDAP prefix.
base_regno Int containing the base register number.
static void
gen_bdap (base_regno, exprP)
- int base_regno;
- expressionS *exprP;
+ int base_regno;
+ expressionS *exprP;
{
unsigned int opcode;
char *opcodep;
/* Put out the prefix opcode; assume quick immediate mode at first. */
opcode = BDAP_QUICK_OPCODE | (base_regno << 12);
- opcodep = frag_more (2);
+ opcodep = cris_insn_first_word_frag ();
md_number_to_chars (opcodep, opcode, 2);
if (exprP->X_op == O_constant)
{
/* We have an absolute expression that we know the size of right
- now. */
+ now. */
long int value;
int size;
/* Outside range for a "word", make it a dword. */
size = 2;
else
- /* Assume "word" size. */
+ /* Assume "word" size. */
size = 1;
/* If this is a signed-byte value, we can fit it into the prefix
}
}
else
- /* The expression is not defined yet but may become absolute. We make
- it a relocation to be relaxed. */
+ {
+ /* Handle complex expressions. */
+ valueT addvalue
+ = exprP->X_op_symbol != NULL ? 0 : exprP->X_add_number;
+ symbolS *sym
+ = (exprP->X_op_symbol != NULL
+ ? make_expr_symbol (exprP) : exprP->X_add_symbol);
+
+ /* The expression is not defined yet but may become absolute. We
+ make it a relocation to be relaxed. */
frag_var (rs_machine_dependent, 4, 0,
ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF),
- exprP->X_add_symbol, exprP->X_add_number, opcodep);
+ sym, addvalue, opcodep);
+ }
}
-
/* Encode a branch displacement in the range -256..254 into the form used
by CRIS conditional branch instructions.
return disp;
}
-
/* Generate code and fixes for a 32-bit conditional branch instruction
created by "extending" an existing 8-bit branch instruction.
long int add_num;
{
if (warn_for_branch_expansion)
- {
- /* FIXME: Find out and change to as_warn_where. Add testcase. */
- as_warn (_("32-bit conditional branch generated"));
- }
+ as_warn_where (fragP->fr_file, fragP->fr_line,
+ _("32-bit conditional branch generated"));
/* Here, writep points to what will be opcodep + 2. First, we change
the actual branch in opcodep[0] and opcodep[1], so that in the
opcodep+10: Bcc .-6
This means we don't have to worry about changing the opcode or
- messing with te delay-slot instruction. So, we move it to last in
+ messing with the delay-slot instruction. So, we move it to last in
the "extended" branch, and just change the displacement. Admittedly,
it's not the optimal extended construct, but we should get this
rarely enough that it shouldn't matter. */
- writep[8] = branch_disp (-2-6);
+ writep[8] = branch_disp (-2 - 6);
writep[9] = opcodep[1];
/* Then, we change the branch to an unconditional branch over the
md_number_to_chars (writep, NOP_OPCODE, 2);
/* Then the extended thing, the 32-bit jump insn.
- opcodep+4: JUMP [PC+] */
+ opcodep+4: JUMP [PC+]
+ or, in the PIC case,
+ opcodep+4: ADD [PC+],PC. */
- md_number_to_chars (writep + 2, JUMP_PC_INCR_OPCODE, 2);
+ md_number_to_chars (writep + 2,
+ pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2);
/* We have to fill in the actual value too.
opcodep+6: .DWORD
This is most probably an expression, but we can cope with an absolute
- value too. FIXME: Testcase needed. */
+ value too. FIXME: Testcase needed with and without pic. */
if (add_symP == NULL && sub_symP == NULL)
- /* An absolute address. */
- md_number_to_chars (writep + 4, add_num, 4);
+ {
+ /* An absolute address. */
+ if (pic)
+ fix_new (fragP, writep + 4 - fragP->fr_literal, 4,
+ section_symbol (absolute_section),
+ add_num, 1, BFD_RELOC_32_PCREL);
+ else
+ md_number_to_chars (writep + 4, add_num, 4);
+ }
else
{
- /* Not absolute, we have to make it a frag for later evaluation. */
- know (sub_symP == 0);
+ if (sub_symP != NULL)
+ as_bad_where (fragP->fr_file, fragP->fr_line,
+ _("Complex expression not supported"));
+ /* Not absolute, we have to make it a frag for later evaluation. */
fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP,
- add_num, 0, BFD_RELOC_32);
+ add_num, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32);
}
}
+/* Get the size of an immediate-reloc in bytes. Only valid for PIC
+ relocs. */
+
+static unsigned int
+cris_get_pic_reloc_size (reloc)
+ bfd_reloc_code_real_type reloc;
+{
+ return reloc == BFD_RELOC_CRIS_16_GOTPLT || reloc == BFD_RELOC_CRIS_16_GOT
+ ? 2 : 4;
+}
+
+/* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
+ Adjust *EXPRP with any addend found after the PIC suffix. */
+
+static void
+cris_get_pic_suffix (cPP, relocp, exprP)
+ char **cPP;
+ bfd_reloc_code_real_type *relocp;
+ expressionS *exprP;
+{
+ char *s = *cPP;
+ unsigned int i;
+ expressionS const_expr;
+
+ const struct pic_suffixes_struct
+ {
+ const char *const suffix;
+ unsigned int len;
+ bfd_reloc_code_real_type reloc;
+ } pic_suffixes[] =
+ {
+#undef PICMAP
+#define PICMAP(s, r) {s, sizeof (s) - 1, r}
+ /* Keep this in order with longest unambiguous prefix first. */
+ PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT),
+ PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT),
+ PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL),
+ PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL),
+ PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL),
+ PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT),
+ PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT)
+ };
+
+ /* We've already seen the ':', so consume it. */
+ s++;
+
+ for (i = 0; i < sizeof (pic_suffixes)/sizeof (pic_suffixes[0]); i++)
+ {
+ if (strncmp (s, pic_suffixes[i].suffix, pic_suffixes[i].len) == 0
+ && ! is_part_of_name (s[pic_suffixes[i].len]))
+ {
+ /* We have a match. Consume the suffix and set the relocation
+ type. */
+ s += pic_suffixes[i].len;
+
+ /* There can be a constant term appended. If so, we will add it
+ to *EXPRP. */
+ if (*s == '+' || *s == '-')
+ {
+ if (! cris_get_expression (&s, &const_expr))
+ /* There was some kind of syntax error. Bail out. */
+ break;
+
+ /* Allow complex expressions as the constant part. It still
+ has to be an assembly-time constant or there will be an
+ error emitting the reloc. This makes the PIC qualifiers
+ idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
+ recognize here; the latter is parsed in the incoming
+ expression. */
+ exprP->X_add_symbol = make_expr_symbol (exprP);
+ exprP->X_op = O_add;
+ exprP->X_add_number = 0;
+ exprP->X_op_symbol = make_expr_symbol (&const_expr);
+ }
+
+ *relocp = pic_suffixes[i].reloc;
+ *cPP = s;
+ return;
+ }
+ }
+
+ /* No match. Don't consume anything; fall back and there will be a
+ syntax error. */
+}
/* This *could* be:
- Turn a string in input_line_pointer into a floating point constant of
- type type, and store the appropriate bytes in *litp. The number of
- LITTLENUMS emitted is stored in *sizep.
+ Turn a string in input_line_pointer into a floating point constant
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP.
type A character from FLTCHARS that describes what kind of
floating-point number is wanted.
md_atof (type, litp, sizep)
char type ATTRIBUTE_UNUSED;
char *litp ATTRIBUTE_UNUSED;
- int *sizep ATTRIBUTE_UNUSED;
+ int *sizep ATTRIBUTE_UNUSED;
{
/* FIXME: Is this function mentioned in the internals.texi manual? If
not, add it. */
return _("Bad call to md_atof () - floating point formats are not supported");
}
-
/* Turn a number as a fixS * into a series of bytes that represents the
number on the target machine. The purpose of this procedure is the
same as that of md_number_to_chars but this procedure is supposed to
n The number of bytes in "val" that should be stored.
- fixP The fix to be applied to the bit field starting at bufp. */
+ fixP The fix to be applied to the bit field starting at bufp.
+
+ seg The segment containing this number. */
static void
-cris_number_to_imm (bufp, val, n, fixP)
+cris_number_to_imm (bufp, val, n, fixP, seg)
char *bufp;
long val;
int n;
fixS *fixP;
+ segT seg;
{
segT sym_seg;
uninteresting old version) for the relocation.
Maybe delete some day. */
if (fixP->fx_addsy
- && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != now_seg)
+ && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != seg)
val += sym_seg->vma;
+ if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
+ switch (fixP->fx_r_type)
+ {
+ /* These must be fully resolved when getting here. */
+ case BFD_RELOC_32_PCREL:
+ case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_8_PCREL:
+ as_bad_where (fixP->fx_frag->fr_file, fixP->fx_frag->fr_line,
+ _("PC-relative relocation must be trivially resolved"));
+ default:
+ ;
+ }
+
switch (fixP->fx_r_type)
{
/* Ditto here, we put the addend into the object code as
regression tests on the object file contents. FIXME: Seems
uninteresting now that we have a test suite. */
+ case BFD_RELOC_CRIS_16_GOT:
+ case BFD_RELOC_CRIS_32_GOT:
+ case BFD_RELOC_CRIS_32_GOTREL:
+ case BFD_RELOC_CRIS_16_GOTPLT:
+ case BFD_RELOC_CRIS_32_GOTPLT:
+ case BFD_RELOC_CRIS_32_PLT_GOTREL:
+ case BFD_RELOC_CRIS_32_PLT_PCREL:
+ /* We don't want to put in any kind of non-zero bits in the data
+ being relocated for these. */
+ break;
+
case BFD_RELOC_32:
+ case BFD_RELOC_32_PCREL:
/* No use having warnings here, since most hosts have a 32-bit type
for "long" (which will probably change soon, now that I wrote
this). */
or should we change them into as_bad_where? */
case BFD_RELOC_16:
+ case BFD_RELOC_16_PCREL:
if (val > 0xffff || val < -32768)
as_bad (_("Value not in 16 bit range: %ld"), val);
if (! fixP->fx_addsy)
break;
case BFD_RELOC_8:
+ case BFD_RELOC_8_PCREL:
if (val > 255 || val < -128)
as_bad (_("Value not in 8 bit range: %ld"), val);
if (! fixP->fx_addsy)
case BFD_RELOC_NONE:
/* May actually happen automatically. For example at broken
words, if the word turns out not to be broken.
- FIXME: When? Which testcase? */
+ FIXME: When? Which testcase? */
if (! fixP->fx_addsy)
md_number_to_chars (bufp, val, n);
break;
&& !S_IS_DEFINED (fixP->fx_addsy)
&& !S_IS_WEAK (fixP->fx_addsy))
S_SET_WEAK (fixP->fx_addsy);
- /* FALLTHROUGH. */
+ /* Fall through. */
+
case BFD_RELOC_VTABLE_ENTRY:
- /* FIXME: I'm not sure why we do this (as does other ports), but it
- might be that this relocation can only be finished at link time. */
fixP->fx_done = 0;
break;
}
}
-
/* Processes machine-dependent command line options. Called once for
each option on the command line that the machine-independent part of
GAS does not understand. */
+
int
md_parse_option (arg, argp)
int arg;
{
case 'H':
case 'h':
+ printf (_("Please use --help to see usage and options for this assembler.\n"));
md_show_usage (stdout);
- exit (0); /* Don't continue */
+ exit (EXIT_SUCCESS);
case 'N':
warn_for_branch_expansion = 1;
return 1;
+ case OPTION_NO_US:
+ demand_register_prefix = true;
+
+ if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
+ as_bad (_("--no-underscore is invalid with a.out format"));
+ else
+ symbols_have_leading_underscore = false;
+ return 1;
+
+ case OPTION_US:
+ demand_register_prefix = false;
+ symbols_have_leading_underscore = true;
+ return 1;
+
+ case OPTION_PIC:
+ pic = true;
+ return 1;
+
default:
return 0;
- }
+ }
}
/* Round up a section size to the appropriate boundary. */
return size;
}
-
/* Generate a machine-dependent relocation. */
arelent *
tc_gen_reloc (section, fixP)
switch (fixP->fx_r_type)
{
+ case BFD_RELOC_CRIS_16_GOT:
+ case BFD_RELOC_CRIS_32_GOT:
+ case BFD_RELOC_CRIS_16_GOTPLT:
+ case BFD_RELOC_CRIS_32_GOTPLT:
+ case BFD_RELOC_CRIS_32_GOTREL:
+ case BFD_RELOC_CRIS_32_PLT_GOTREL:
+ case BFD_RELOC_CRIS_32_PLT_PCREL:
case BFD_RELOC_32:
case BFD_RELOC_16:
case BFD_RELOC_8:
relP->address = fixP->fx_frag->fr_address + fixP->fx_where;
if (fixP->fx_pcrel)
- /* FIXME: Is this correct? */
+ /* FIXME: Is this correct? */
relP->addend = fixP->fx_addnumber;
else
- /* At least *this one* is correct. */
+ /* At least *this one* is correct. */
relP->addend = fixP->fx_offset;
/* This is the standard place for KLUDGEs to work around bugs in
if (OUTPUT_FLAVOR == bfd_target_aout_flavour
&& fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy)
&& ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy)))
- {
- relP->addend -= S_GET_VALUE (fixP->fx_addsy);
- }
+ {
+ relP->addend -= S_GET_VALUE (fixP->fx_addsy);
+ }
relP->howto = bfd_reloc_type_lookup (stdoutput, code);
if (! relP->howto)
return relP;
}
-
/* Machine-dependent usage-output. */
+
void
md_show_usage (stream)
FILE *stream;
{
- fprintf (stream, _("\n-- GNU as for CRIS\n"));
- fprintf (stream, "\n");
- fprintf (stream,
- _("*** Usage: as-cris [switches] [-o objectfile] [files...]\n"));
- fprintf (stream, _("Target-specific switches:\n"));
- fprintf (stream, _(" -h, -H : Don't execute, print this help text.\n"));
- fprintf (stream,
- _(" -N : Warn when branches are expanded to jumps.\n\n"));
- fprintf (stream, _("Use as-cris --help to see more options.\n"));
- fprintf (stream, _("objectfile : Output file in the a.out format %s"),
- _("described in the users manual.\n"));
- fprintf (stream, _(" Default output file is \"a.out\".\n"));
- fprintf (stream, _("files ... : Input files in the source format %s"),
- _(" described in the users manual.\n"));
- fprintf (stream, _(" Default input file is standard input.\n"));
- fprintf (stream, _("Description : Assembler for the CRIS processor.\n"));
+ /* The messages are formatted to line up with the generic options. */
+ fprintf (stream, _("CRIS-specific options:\n"));
+ fprintf (stream, "%s",
+ _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
+ fprintf (stream, "%s",
+ _(" -N Warn when branches are expanded to jumps.\n"));
+ fprintf (stream, "%s",
+ _(" --underscore User symbols are normally prepended with underscore.\n"));
+ fprintf (stream, "%s",
+ _(" Registers will not need any prefix.\n"));
+ fprintf (stream, "%s",
+ _(" --no-underscore User symbols do not have any prefix.\n"));
+ fprintf (stream, "%s",
+ _(" Registers will require a `$'-prefix.\n"));
+ fprintf (stream, "%s",
+ _(" --pic Enable generation of position-independent code.\n"));
}
-
/* Apply a fixS (fixup of an instruction or data that we didn't have
- enough info to complete immediately) to the data in a frag. */
+ enough info to complete immediately) to the data in a frag. */
-int
-md_apply_fix (fixP, valP)
+void
+md_apply_fix3 (fixP, valP, seg)
fixS *fixP;
valueT *valP;
+ segT seg;
{
- long val = *valP;
-
+ /* This assignment truncates upper bits if valueT is 64 bits (as with
+ --enable-64-bit-bfd), which is fine here, though we cast to avoid
+ compiler any warnings. */
+ long val = (long) *valP;
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
fixP->fx_done = 1;
}
else
- {
- /* I took this from tc-arc.c, since we used to not support
- fx_subsy != NULL. I'm not totally sure it's TRT. */
- if (fixP->fx_subsy != (symbolS *) NULL)
- {
- if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
- val -= S_GET_VALUE (fixP->fx_subsy);
- else
- {
- /* We can't actually support subtracting a symbol. */
+ {
+ /* I took this from tc-arc.c, since we used to not support
+ fx_subsy != NULL. I'm not totally sure it's TRT. */
+ if (fixP->fx_subsy != (symbolS *) NULL)
+ {
+ if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
+ val -= S_GET_VALUE (fixP->fx_subsy);
+ else
+ /* We can't actually support subtracting a symbol. */
as_bad_where (fixP->fx_file, fixP->fx_line,
_("expression too complex"));
- }
- }
-
- cris_number_to_imm (buf, val, fixP->fx_size, fixP);
- }
+ }
- return 1;
+ cris_number_to_imm (buf, val, fixP->fx_size, fixP, seg);
+ }
}
-
/* All relocations are relative to the location just after the fixup;
the address of the fixup plus its size. */
valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
/* FIXME: We get here only at the end of assembly, when X in ".-X" is
- still unknown. Since we don't have pc-relative relocations, this
- is invalid. What to do if anything for a.out, is to add
+ still unknown. Since we don't have pc-relative relocations in a.out,
+ this is invalid. What to do if anything for a.out, is to add
pc-relative relocations everywhere including the elinux program
- loader. */
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Invalid pc-relative relocation"));
+ loader. For ELF, allow straight-forward PC-relative relocations,
+ which are always relative to the location after the relocation. */
+ if (OUTPUT_FLAVOR != bfd_target_elf_flavour
+ || (fixP->fx_r_type != BFD_RELOC_8_PCREL
+ && fixP->fx_r_type != BFD_RELOC_16_PCREL
+ && fixP->fx_r_type != BFD_RELOC_32_PCREL))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Invalid pc-relative relocation"));
return fixP->fx_size + addr;
}
-
-/* We have no need to give defaults for symbol-values. */
+/* We have no need to give defaults for symbol-values. */
symbolS *
md_undefined_symbol (name)
char *name ATTRIBUTE_UNUSED;
return 0;
}
-
/* Definition of TC_FORCE_RELOCATION.
FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c
when doing multi-object format with ELF, since it's the only other
md_cris_force_relocation (fixp)
struct fix *fixp;
{
- if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
- || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
- return 1;
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ case BFD_RELOC_CRIS_16_GOT:
+ case BFD_RELOC_CRIS_32_GOT:
+ case BFD_RELOC_CRIS_16_GOTPLT:
+ case BFD_RELOC_CRIS_32_GOTPLT:
+ case BFD_RELOC_CRIS_32_GOTREL:
+ case BFD_RELOC_CRIS_32_PLT_GOTREL:
+ case BFD_RELOC_CRIS_32_PLT_PCREL:
+ return 1;
+ default:
+ ;
+ }
+
return 0;
}
struct broken_word *brokwP;
{
if (new_offset > 32767 || new_offset < -32768)
- /* We really want a genuine error, not a warning, so make it one. */
+ /* We really want a genuine error, not a warning, so make it one. */
as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line,
_("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
(long) new_offset);
}
+/* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
+
+static void cris_force_reg_prefix ()
+{
+ demand_register_prefix = true;
+}
+
+/* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
+
+static void cris_relax_reg_prefix ()
+{
+ demand_register_prefix = false;
+}
+
+/* Adjust for having a leading '_' on all user symbols. */
+
+static void cris_sym_leading_underscore ()
+{
+ /* We can't really do anything more than assert that what the program
+ thinks symbol starts with agrees with the command-line options, since
+ the bfd is already created. */
+
+ if (symbols_have_leading_underscore == false)
+ as_bad (_(".syntax %s requires command-line option `--underscore'"),
+ SYNTAX_USER_SYM_LEADING_UNDERSCORE);
+}
+
+/* Adjust for not having any particular prefix on user symbols. */
+
+static void cris_sym_no_leading_underscore ()
+{
+ if (symbols_have_leading_underscore == true)
+ as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
+ SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE);
+}
+
+/* Handle the .syntax pseudo, which takes an argument that decides what
+ syntax the assembly code has. */
+
+static void
+s_syntax (ignore)
+ int ignore ATTRIBUTE_UNUSED;
+{
+ static const struct syntaxes
+ {
+ const char *operand;
+ void (*fn) PARAMS ((void));
+ } syntax_table[] =
+ {{SYNTAX_ENFORCE_REG_PREFIX, cris_force_reg_prefix},
+ {SYNTAX_RELAX_REG_PREFIX, cris_relax_reg_prefix},
+ {SYNTAX_USER_SYM_LEADING_UNDERSCORE, cris_sym_leading_underscore},
+ {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE, cris_sym_no_leading_underscore}};
+
+ const struct syntaxes *sp;
+
+ for (sp = syntax_table;
+ sp < syntax_table + sizeof (syntax_table) / sizeof (syntax_table[0]);
+ sp++)
+ {
+ if (strncmp (input_line_pointer, sp->operand,
+ strlen (sp->operand)) == 0)
+ {
+ (sp->fn) ();
+
+ input_line_pointer += strlen (sp->operand);
+ demand_empty_rest_of_line ();
+ return;
+ }
+ }
+
+ as_bad (_("Unknown .syntax operand"));
+}
+
+/* Wrapper for dwarf2_directive_file to emit error if this is seen when
+ not emitting ELF. */
+
+static void
+s_cris_file (dummy)
+ int dummy;
+{
+ if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
+ as_bad (_("Pseudodirective .file is only valid when generating ELF"));
+ else
+ dwarf2_directive_file (dummy);
+}
+
+/* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
+ emitting ELF. */
+
+static void
+s_cris_loc (dummy)
+ int dummy;
+{
+ if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
+ as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
+ else
+ dwarf2_directive_loc (dummy);
+}
+
/*
* Local variables:
* eval: (c-set-style "gnu")
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