This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
/*
Contributed by Steve Chamberlain
DR0_REGNUM = 141,
DR_LAST_REGNUM = 172,
/* FPP stands for Floating Point Pair, to avoid confusion with
- GDB's FP0_REGNUM, which is the number of the first Floating
+ GDB's gdbarch_fp0_regnum, which is the number of the first Floating
point register. Unfortunately on the sh5, the floating point
registers are called FR, and the floating point pairs are called FP. */
FPP0_REGNUM = 173,
};
static const char *
-sh64_register_name (int reg_nr)
+sh64_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] =
{
symbol that marks it as 32-bit function. The MSB of the minimal
symbol's "info" field is used for this purpose.
- ELF_MAKE_MSYMBOL_SPECIAL
- tests whether an ELF symbol is "special", i.e. refers
- to a 32-bit function, and sets a "special" bit in a
+ gdbarch_elf_make_msymbol_special tests whether an ELF symbol is "special",
+ i.e. refers to a 32-bit function, and sets a "special" bit in a
minimal symbol to mark it as a 32-bit function
MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol */
}
static const unsigned char *
-sh64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+sh64_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
{
/* The BRK instruction for shmedia is
01101111 11110101 11111111 11110000
which translates in big endian mode to 0x0, 0x3b
and in little endian mode to 0x3b, 0x0*/
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
if (pc_is_isa32 (*pcptr))
{
static int
gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info)
{
- info->endian = TARGET_BYTE_ORDER;
+ info->endian = gdbarch_byte_order (current_gdbarch);
return print_insn_sh (memaddr, info);
}
/* For vectors of 4 floating point registers. */
static int
-sh64_fv_reg_base_num (int fv_regnum)
+sh64_fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
{
int fp_regnum;
- fp_regnum = FP0_REGNUM +
- (fv_regnum - FV0_REGNUM) * 4;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch) + (fv_regnum - FV0_REGNUM) * 4;
return fp_regnum;
}
/* For double precision floating point registers, i.e 2 fp regs.*/
static int
-sh64_dr_reg_base_num (int dr_regnum)
+sh64_dr_reg_base_num (struct gdbarch *gdbarch, int dr_regnum)
{
int fp_regnum;
- fp_regnum = FP0_REGNUM +
- (dr_regnum - DR0_REGNUM) * 2;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch) + (dr_regnum - DR0_REGNUM) * 2;
return fp_regnum;
}
/* For pairs of floating point registers */
static int
-sh64_fpp_reg_base_num (int fpp_regnum)
+sh64_fpp_reg_base_num (struct gdbarch *gdbarch, int fpp_regnum)
{
int fp_regnum;
- fp_regnum = FP0_REGNUM +
- (fpp_regnum - FPP0_REGNUM) * 2;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch) + (fpp_regnum - FPP0_REGNUM) * 2;
return fp_regnum;
}
*/
/* *INDENT-ON* */
static int
-sh64_compact_reg_base_num (int reg_nr)
+sh64_compact_reg_base_num (struct gdbarch *gdbarch, int reg_nr)
{
int base_regnum = reg_nr;
/* floating point register N maps to floating point register N */
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
- base_regnum = reg_nr - FP0_C_REGNUM + FP0_REGNUM;
+ base_regnum = reg_nr - FP0_C_REGNUM + gdbarch_fp0_regnum (gdbarch);
/* double prec register N maps to base regnum for double prec register N */
else if (reg_nr >= DR0_C_REGNUM
&& reg_nr <= DR_LAST_C_REGNUM)
- base_regnum = sh64_dr_reg_base_num (DR0_REGNUM + reg_nr - DR0_C_REGNUM);
+ base_regnum = sh64_dr_reg_base_num (gdbarch,
+ DR0_REGNUM + reg_nr - DR0_C_REGNUM);
/* vector N maps to base regnum for vector register N */
else if (reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
- base_regnum = sh64_fv_reg_base_num (FV0_REGNUM + reg_nr - FV0_C_REGNUM);
+ base_regnum = sh64_fv_reg_base_num (gdbarch,
+ FV0_REGNUM + reg_nr - FV0_C_REGNUM);
else if (reg_nr == PC_C_REGNUM)
- base_regnum = PC_REGNUM;
+ base_regnum = gdbarch_pc_regnum (gdbarch);
else if (reg_nr == GBR_C_REGNUM)
base_regnum = 16;
base_regnum = FPSCR_REGNUM; /*???? this register is a mess. */
else if (reg_nr == FPUL_C_REGNUM)
- base_regnum = FP0_REGNUM + 32;
+ base_regnum = gdbarch_fp0_regnum (gdbarch) + 32;
return base_regnum;
}
}
static CORE_ADDR
-sh64_extract_struct_value_address (struct regcache *regcache)
-{
- /* FIXME: cagney/2004-01-17: Does the ABI guarantee that the return
- address regster is preserved across function calls? Probably
- not, making this function wrong. */
- ULONGEST val;
- regcache_raw_read_unsigned (regcache, STRUCT_RETURN_REGNUM, &val);
- return val;
-}
-
-static CORE_ADDR
sh64_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
{
return sp & ~7;
in eight registers available. Loop thru args from first to last. */
int_argreg = ARG0_REGNUM;
- float_argreg = FP0_REGNUM;
+ float_argreg = gdbarch_fp0_regnum (gdbarch);
double_argreg = DR0_REGNUM;
for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
if (TYPE_CODE (type) != TYPE_CODE_FLT)
{
- argreg_size = register_size (current_gdbarch, int_argreg);
+ argreg_size = register_size (gdbarch, int_argreg);
if (len < argreg_size)
{
/* value gets right-justified in the register or stack word */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
memcpy (valbuf + argreg_size - len,
(char *) value_contents (args[argnum]), len);
else
{
/* Goes in FR0...FR11 */
regcache_cooked_write (regcache,
- FP0_REGNUM + float_arg_index,
+ gdbarch_fp0_regnum (gdbarch)
+ + float_arg_index,
val);
fp_args[float_arg_index] = 1;
/* Skip the corresponding general argument register. */
regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
/* Update stack pointer. */
- regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_unsigned (regcache,
+ gdbarch_sp_regnum (gdbarch), sp);
return sp;
}
sh64_extract_return_value (struct type *type, struct regcache *regcache,
void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
int len = TYPE_LENGTH (type);
-
+
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
if (len == 4)
{
- /* Return value stored in FP0_REGNUM */
- regcache_raw_read (regcache, FP0_REGNUM, valbuf);
+ /* Return value stored in gdbarch_fp0_regnum */
+ regcache_raw_read (regcache,
+ gdbarch_fp0_regnum (gdbarch), valbuf);
}
else if (len == 8)
{
regcache_cooked_read (regcache, DR0_REGNUM, buf);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
buf, &val);
else
at the most significant end. */
regcache_raw_read (regcache, DEFAULT_RETURN_REGNUM, buf);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
- offset = register_size (current_gdbarch, DEFAULT_RETURN_REGNUM)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ offset = register_size (gdbarch, DEFAULT_RETURN_REGNUM)
- len;
else
offset = 0;
sh64_store_return_value (struct type *type, struct regcache *regcache,
const void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
char buf[64]; /* more than enough... */
int len = TYPE_LENGTH (type);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
- int i, regnum = FP0_REGNUM;
+ int i, regnum = gdbarch_fp0_regnum (gdbarch);
for (i = 0; i < len; i += 4)
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
(char *) valbuf + len - 4 - i);
else
int return_register = DEFAULT_RETURN_REGNUM;
int offset = 0;
- if (len <= register_size (current_gdbarch, return_register))
+ if (len <= register_size (gdbarch, return_register))
{
/* Pad with zeros. */
- memset (buf, 0, register_size (current_gdbarch, return_register));
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
- offset = 0; /*register_size (current_gdbarch,
+ memset (buf, 0, register_size (gdbarch, return_register));
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
+ offset = 0; /*register_size (gdbarch,
return_register) - len;*/
else
- offset = register_size (current_gdbarch, return_register) - len;
+ offset = register_size (gdbarch, return_register) - len;
memcpy (buf + offset, valbuf, len);
regcache_raw_write (regcache, return_register, buf);
}
static void
-sh64_show_media_regs (void)
+sh64_show_media_regs (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
int i;
- printf_filtered ("PC=%s SR=%016llx \n",
- paddr (read_register (PC_REGNUM)),
- (long long) read_register (SR_REGNUM));
+ printf_filtered
+ ("PC=%s SR=%016llx \n",
+ paddr (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum (gdbarch))),
+ (long long) get_frame_register_unsigned (frame, SR_REGNUM));
- printf_filtered ("SSR=%016llx SPC=%016llx \n",
- (long long) read_register (SSR_REGNUM),
- (long long) read_register (SPC_REGNUM));
- printf_filtered ("FPSCR=%016lx\n ",
- (long) read_register (FPSCR_REGNUM));
+ printf_filtered
+ ("SSR=%016llx SPC=%016llx \n",
+ (long long) get_frame_register_unsigned (frame, SSR_REGNUM),
+ (long long) get_frame_register_unsigned (frame, SPC_REGNUM));
+ printf_filtered
+ ("FPSCR=%016lx\n ",
+ (long) get_frame_register_unsigned (frame, FPSCR_REGNUM));
for (i = 0; i < 64; i = i + 4)
- printf_filtered ("\nR%d-R%d %016llx %016llx %016llx %016llx\n",
- i, i + 3,
- (long long) read_register (i + 0),
- (long long) read_register (i + 1),
- (long long) read_register (i + 2),
- (long long) read_register (i + 3));
+ printf_filtered
+ ("\nR%d-R%d %016llx %016llx %016llx %016llx\n",
+ i, i + 3,
+ (long long) get_frame_register_unsigned (frame, i + 0),
+ (long long) get_frame_register_unsigned (frame, i + 1),
+ (long long) get_frame_register_unsigned (frame, i + 2),
+ (long long) get_frame_register_unsigned (frame, i + 3));
printf_filtered ("\n");
for (i = 0; i < 64; i = i + 8)
- printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- i, i + 7,
- (long) read_register (FP0_REGNUM + i + 0),
- (long) read_register (FP0_REGNUM + i + 1),
- (long) read_register (FP0_REGNUM + i + 2),
- (long) read_register (FP0_REGNUM + i + 3),
- (long) read_register (FP0_REGNUM + i + 4),
- (long) read_register (FP0_REGNUM + i + 5),
- (long) read_register (FP0_REGNUM + i + 6),
- (long) read_register (FP0_REGNUM + i + 7));
+ printf_filtered
+ ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+ i, i + 7,
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 0),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 1),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 2),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 3),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 4),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 5),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 6),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 7));
}
static void
-sh64_show_compact_regs (void)
+sh64_show_compact_regs (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
int i;
- printf_filtered ("PC=%s \n",
- paddr (read_register (PC_C_REGNUM)));
-
- printf_filtered ("GBR=%08lx MACH=%08lx MACL=%08lx PR=%08lx T=%08lx\n",
- (long) read_register (GBR_C_REGNUM),
- (long) read_register (MACH_C_REGNUM),
- (long) read_register (MACL_C_REGNUM),
- (long) read_register (PR_C_REGNUM),
- (long) read_register (T_C_REGNUM));
- printf_filtered ("FPSCR=%08lx FPUL=%08lx\n",
- (long) read_register (FPSCR_C_REGNUM),
- (long) read_register (FPUL_C_REGNUM));
+ printf_filtered
+ ("PC=%s \n",
+ paddr (get_frame_register_unsigned (frame, PC_C_REGNUM)));
+
+ printf_filtered
+ ("GBR=%08lx MACH=%08lx MACL=%08lx PR=%08lx T=%08lx\n",
+ (long) get_frame_register_unsigned (frame, GBR_C_REGNUM),
+ (long) get_frame_register_unsigned (frame, MACH_C_REGNUM),
+ (long) get_frame_register_unsigned (frame, MACL_C_REGNUM),
+ (long) get_frame_register_unsigned (frame, PR_C_REGNUM),
+ (long) get_frame_register_unsigned (frame, T_C_REGNUM));
+ printf_filtered
+ ("FPSCR=%08lx FPUL=%08lx\n",
+ (long) get_frame_register_unsigned (frame, FPSCR_C_REGNUM),
+ (long) get_frame_register_unsigned (frame, FPUL_C_REGNUM));
for (i = 0; i < 16; i = i + 4)
- printf_filtered ("\nR%d-R%d %08lx %08lx %08lx %08lx\n",
- i, i + 3,
- (long) read_register (i + 0),
- (long) read_register (i + 1),
- (long) read_register (i + 2),
- (long) read_register (i + 3));
+ printf_filtered
+ ("\nR%d-R%d %08lx %08lx %08lx %08lx\n",
+ i, i + 3,
+ (long) get_frame_register_unsigned (frame, i + 0),
+ (long) get_frame_register_unsigned (frame, i + 1),
+ (long) get_frame_register_unsigned (frame, i + 2),
+ (long) get_frame_register_unsigned (frame, i + 3));
printf_filtered ("\n");
for (i = 0; i < 16; i = i + 8)
- printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- i, i + 7,
- (long) read_register (FP0_REGNUM + i + 0),
- (long) read_register (FP0_REGNUM + i + 1),
- (long) read_register (FP0_REGNUM + i + 2),
- (long) read_register (FP0_REGNUM + i + 3),
- (long) read_register (FP0_REGNUM + i + 4),
- (long) read_register (FP0_REGNUM + i + 5),
- (long) read_register (FP0_REGNUM + i + 6),
- (long) read_register (FP0_REGNUM + i + 7));
+ printf_filtered
+ ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+ i, i + 7,
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 0),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 1),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 2),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 3),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 4),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 5),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 6),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + i + 7));
}
/* FIXME!!! This only shows the registers for shmedia, excluding the
pseudo registers. */
void
-sh64_show_regs (void)
+sh64_show_regs (struct frame_info *frame)
{
- if (pc_is_isa32 (get_frame_pc (get_selected_frame (NULL))))
- sh64_show_media_regs ();
+ if (pc_is_isa32 (get_frame_pc (frame)))
+ sh64_show_media_regs (frame);
else
- sh64_show_compact_regs ();
+ sh64_show_compact_regs (frame);
}
/* *INDENT-OFF* */
static struct type *
sh64_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- if ((reg_nr >= FP0_REGNUM
+ if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
&& reg_nr <= FP_LAST_REGNUM)
|| (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM))
}
static void
-sh64_register_convert_to_virtual (int regnum, struct type *type,
- char *from, char *to)
+sh64_register_convert_to_virtual (struct gdbarch *gdbarch, int regnum,
+ struct type *type, char *from, char *to)
{
- if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
{
/* It is a no-op. */
- memcpy (to, from, register_size (current_gdbarch, regnum));
+ memcpy (to, from, register_size (gdbarch, regnum));
return;
}
}
static void
-sh64_register_convert_to_raw (struct type *type, int regnum,
- const void *from, void *to)
+sh64_register_convert_to_raw (struct gdbarch *gdbarch, struct type *type,
+ int regnum, const void *from, void *to)
{
- if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
{
/* It is a no-op. */
- memcpy (to, from, register_size (current_gdbarch, regnum));
+ memcpy (to, from, register_size (gdbarch, regnum));
return;
}
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = sh64_dr_reg_base_num (reg_nr);
+ base_regnum = sh64_dr_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* DR regs are double precision registers obtained by
+ register_size (gdbarch, base_regnum) * portion));
/* We must pay attention to the endianness. */
- sh64_register_convert_to_virtual (reg_nr,
+ sh64_register_convert_to_virtual (gdbarch, reg_nr,
register_type (gdbarch, reg_nr),
temp_buffer, buffer);
else if (reg_nr >= FPP0_REGNUM
&& reg_nr <= FPP_LAST_REGNUM)
{
- base_regnum = sh64_fpp_reg_base_num (reg_nr);
+ base_regnum = sh64_fpp_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FPP regs are pairs of single precision registers obtained by
else if (reg_nr >= FV0_REGNUM
&& reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = sh64_fv_reg_base_num (reg_nr);
+ base_regnum = sh64_fv_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FV regs are vectors of single precision registers obtained by
else if (reg_nr >= R0_C_REGNUM
&& reg_nr <= T_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
regcache_raw_read (regcache, base_regnum, temp_buffer);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
memcpy (buffer, temp_buffer + offset, 4); /* get LOWER 32 bits only????*/
}
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* Floating point registers map 1-1 to the media fp regs,
else if (reg_nr >= DR0_C_REGNUM
&& reg_nr <= DR_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* DR_C regs are double precision registers obtained by
concatenating 2 single precision floating point registers. */
+ register_size (gdbarch, base_regnum) * portion));
/* We must pay attention to the endianness. */
- sh64_register_convert_to_virtual (reg_nr,
+ sh64_register_convert_to_virtual (gdbarch, reg_nr,
register_type (gdbarch, reg_nr),
temp_buffer, buffer);
}
else if (reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FV_C regs are vectors of single precision registers obtained by
else if (reg_nr == FPUL_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* FPUL_C register is floating point register 32,
same size, same endianness. */
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = sh64_dr_reg_base_num (reg_nr);
+ base_regnum = sh64_dr_reg_base_num (gdbarch, reg_nr);
/* We must pay attention to the endianness. */
- sh64_register_convert_to_raw (register_type (gdbarch, reg_nr),
+ sh64_register_convert_to_raw (gdbarch, register_type (gdbarch, reg_nr),
reg_nr,
buffer, temp_buffer);
else if (reg_nr >= FPP0_REGNUM
&& reg_nr <= FPP_LAST_REGNUM)
{
- base_regnum = sh64_fpp_reg_base_num (reg_nr);
+ base_regnum = sh64_fpp_reg_base_num (gdbarch, reg_nr);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 2; portion++)
else if (reg_nr >= FV0_REGNUM
&& reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = sh64_fv_reg_base_num (reg_nr);
+ base_regnum = sh64_fv_reg_base_num (gdbarch, reg_nr);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
else if (reg_nr >= R0_C_REGNUM
&& reg_nr <= T_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* reg_nr is 32 bit here, and base_regnum is 64 bits. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
else
offset = 0;
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
regcache_raw_write (regcache, base_regnum, buffer);
}
else if (reg_nr >= DR0_C_REGNUM
&& reg_nr <= DR_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
for (portion = 0; portion < 2; portion++)
{
/* We must pay attention to the endianness. */
- sh64_register_convert_to_raw (register_type (gdbarch, reg_nr),
+ sh64_register_convert_to_raw (gdbarch,
+ register_type (gdbarch, reg_nr),
reg_nr,
buffer, temp_buffer);
else if (reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
for (portion = 0; portion < 4; portion++)
{
else if (reg_nr == FPUL_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
regcache_raw_write (regcache, base_regnum, buffer);
}
}
int j;
/* Allocate space for the float. */
- raw_buffer = (unsigned char *) alloca (register_size (gdbarch, FP0_REGNUM));
+ raw_buffer = (unsigned char *) alloca
+ (register_size (gdbarch,
+ gdbarch_fp0_regnum
+ (gdbarch)));
/* Get the data in raw format. */
if (!frame_register_read (frame, regnum, raw_buffer))
- error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
+ error ("can't read register %d (%s)",
+ regnum, gdbarch_register_name (gdbarch, regnum));
/* Get the register as a number */
flt = unpack_double (builtin_type_float, raw_buffer, &inv);
/* Print the name and some spaces. */
- fputs_filtered (REGISTER_NAME (regnum), file);
- print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
+ fputs_filtered (gdbarch_register_name (gdbarch, regnum), file);
+ print_spaces_filtered (15 - strlen (gdbarch_register_name
+ (gdbarch, regnum)), file);
/* Print the value. */
if (inv)
fprintf_filtered (file, "\t(raw 0x");
for (j = 0; j < register_size (gdbarch, regnum); j++)
{
- int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
- : register_size (gdbarch, regnum) - 1 - j;
+ int idx = gdbarch_byte_order (gdbarch)
+ == BFD_ENDIAN_BIG ? j : register_size
+ (gdbarch, regnum) - 1 - j;
fprintf_filtered (file, "%02x", raw_buffer[idx]);
}
fprintf_filtered (file, ")");
{
/* All the sh64-compact mode registers are pseudo registers. */
- if (regnum < NUM_REGS
- || regnum >= NUM_REGS + NUM_PSEUDO_REGS_SH_MEDIA
- + NUM_PSEUDO_REGS_SH_COMPACT)
+ if (regnum < gdbarch_num_regs (gdbarch)
+ || regnum >= gdbarch_num_regs (gdbarch)
+ + NUM_PSEUDO_REGS_SH_MEDIA
+ + NUM_PSEUDO_REGS_SH_COMPACT)
internal_error (__FILE__, __LINE__,
_("Invalid pseudo register number %d\n"), regnum);
else if ((regnum >= DR0_REGNUM && regnum <= DR_LAST_REGNUM))
{
- int fp_regnum = sh64_dr_reg_base_num (regnum);
+ int fp_regnum = sh64_dr_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "dr%d\t0x%08x%08x\n", regnum - DR0_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
(unsigned) get_frame_register_unsigned (frame, fp_regnum + 1));
else if ((regnum >= DR0_C_REGNUM && regnum <= DR_LAST_C_REGNUM))
{
- int fp_regnum = sh64_compact_reg_base_num (regnum);
+ int fp_regnum = sh64_compact_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "dr%d_c\t0x%08x%08x\n", regnum - DR0_C_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
(unsigned) get_frame_register_unsigned (frame, fp_regnum + 1));
else if ((regnum >= FV0_REGNUM && regnum <= FV_LAST_REGNUM))
{
- int fp_regnum = sh64_fv_reg_base_num (regnum);
+ int fp_regnum = sh64_fv_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
regnum - FV0_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
else if ((regnum >= FV0_C_REGNUM && regnum <= FV_LAST_C_REGNUM))
{
- int fp_regnum = sh64_compact_reg_base_num (regnum);
+ int fp_regnum = sh64_compact_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "fv%d_c\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
regnum - FV0_C_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
else if (regnum >= FPP0_REGNUM && regnum <= FPP_LAST_REGNUM)
{
- int fp_regnum = sh64_fpp_reg_base_num (regnum);
+ int fp_regnum = sh64_fpp_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "fpp%d\t0x%08x\t0x%08x\n", regnum - FPP0_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
(unsigned) get_frame_register_unsigned (frame, fp_regnum + 1));
else if (regnum >= R0_C_REGNUM && regnum <= R_LAST_C_REGNUM)
{
- int c_regnum = sh64_compact_reg_base_num (regnum);
+ int c_regnum = sh64_compact_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "r%d_c\t0x%08x\n", regnum - R0_C_REGNUM,
(unsigned) get_frame_register_unsigned (frame, c_regnum));
}
{
unsigned char raw_buffer[MAX_REGISTER_SIZE];
- fputs_filtered (REGISTER_NAME (regnum), file);
- print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
+ fputs_filtered (gdbarch_register_name (gdbarch, regnum), file);
+ print_spaces_filtered (15 - strlen (gdbarch_register_name
+ (gdbarch, regnum)), file);
/* Get the data in raw format. */
if (!frame_register_read (frame, regnum, raw_buffer))
sh64_print_register (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, int regnum)
{
- if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (regnum < 0 || regnum >= gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch))
internal_error (__FILE__, __LINE__,
_("Invalid register number %d\n"), regnum);
- else if (regnum >= 0 && regnum < NUM_REGS)
+ else if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
{
if (TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT)
sh64_do_fp_register (gdbarch, file, frame, regnum); /* FP regs */
sh64_do_register (gdbarch, file, frame, regnum);
}
- else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum < gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch))
sh64_do_pseudo_register (gdbarch, file, frame, regnum);
}
{
if (regnum != -1) /* do one specified register */
{
- if (*(REGISTER_NAME (regnum)) == '\0')
+ if (*(gdbarch_register_name (gdbarch, regnum)) == '\0')
error ("Not a valid register for the current processor type");
sh64_print_register (gdbarch, file, frame, regnum);
/* do all (or most) registers */
{
regnum = 0;
- while (regnum < NUM_REGS)
+ while (regnum < gdbarch_num_regs (gdbarch))
{
/* If the register name is empty, it is undefined for this
processor, so don't display anything. */
- if (REGISTER_NAME (regnum) == NULL
- || *(REGISTER_NAME (regnum)) == '\0')
+ if (gdbarch_register_name (gdbarch, regnum) == NULL
+ || *(gdbarch_register_name (gdbarch, regnum)) == '\0')
{
regnum++;
continue;
regnum ++;
}
else
- regnum += FP_LAST_REGNUM - FP0_REGNUM; /* skip FP regs */
+ regnum += FP_LAST_REGNUM - gdbarch_fp0_regnum (gdbarch);
+ /* skip FP regs */
}
else
{
}
if (fpregs)
- while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ while (regnum < gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch))
{
sh64_do_pseudo_register (gdbarch, file, frame, regnum);
regnum++;
{
if (regnum != -1) /* do one specified register */
{
- if (*(REGISTER_NAME (regnum)) == '\0')
+ if (*(gdbarch_register_name (gdbarch, regnum)) == '\0')
error ("Not a valid register for the current processor type");
if (regnum >= 0 && regnum < R0_C_REGNUM)
/* do all compact registers */
{
regnum = R0_C_REGNUM;
- while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ while (regnum < gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch))
{
sh64_do_pseudo_register (gdbarch, file, frame, regnum);
regnum++;
static struct sh64_frame_cache *
sh64_frame_cache (struct frame_info *next_frame, void **this_cache)
{
+ struct gdbarch *gdbarch;
struct sh64_frame_cache *cache;
CORE_ADDR current_pc;
int i;
if (*this_cache)
return *this_cache;
+ gdbarch = get_frame_arch (next_frame);
cache = sh64_alloc_frame_cache ();
*this_cache = cache;
if (cache->base == 0)
return cache;
- cache->pc = frame_func_unwind (next_frame);
+ cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
if (cache->pc != 0)
- sh64_analyze_prologue (current_gdbarch, cache, cache->pc, current_pc);
+ sh64_analyze_prologue (gdbarch, cache, cache->pc, current_pc);
if (!cache->uses_fp)
{
setup yet. Try to reconstruct the base address for the stack
frame by looking at the stack pointer. For truly "frameless"
functions this might work too. */
- cache->base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
+ cache->base = frame_unwind_register_unsigned
+ (next_frame, gdbarch_sp_regnum (gdbarch));
}
/* Now that we have the base address for the stack frame we can
int *realnump, gdb_byte *valuep)
{
struct sh64_frame_cache *cache = sh64_frame_cache (next_frame, this_cache);
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
gdb_assert (regnum >= 0);
- if (regnum == SP_REGNUM && cache->saved_sp)
+ if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
{
*optimizedp = 0;
*lvalp = not_lval;
{
/* Store the value. */
store_unsigned_integer (valuep,
- register_size (current_gdbarch, SP_REGNUM),
+ register_size (gdbarch,
+ gdbarch_sp_regnum (gdbarch)),
cache->saved_sp);
}
return;
/* The PC of the previous frame is stored in the PR register of
the current frame. Frob regnum so that we pull the value from
the correct place. */
- if (regnum == PC_REGNUM)
+ if (regnum == gdbarch_pc_regnum (gdbarch))
regnum = PR_REGNUM;
if (regnum < SIM_SH64_NR_REGS && cache->saved_regs[regnum] != -1)
{
- int reg_size = register_size (current_gdbarch, regnum);
+ int reg_size = register_size (gdbarch, regnum);
int size;
*optimizedp = 0;
*lvalp = lval_memory;
*addrp = cache->saved_regs[regnum];
*realnump = -1;
- if (gdbarch_tdep (current_gdbarch)->sh_abi == SH_ABI_32
+ if (gdbarch_tdep (gdbarch)->sh_abi == SH_ABI_32
&& (regnum == MEDIA_FP_REGNUM || regnum == PR_REGNUM))
size = 4;
else
if (valuep)
{
memset (valuep, 0, reg_size);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
read_memory (*addrp, valuep, size);
else
read_memory (*addrp, (char *) valuep + reg_size - size, size);
static CORE_ADDR
sh64_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_unwind_register_unsigned (next_frame, SP_REGNUM);
+ return frame_unwind_register_unsigned (next_frame,
+ gdbarch_sp_regnum (gdbarch));
}
static CORE_ADDR
sh64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_unwind_register_unsigned (next_frame, PC_REGNUM);
+ return frame_unwind_register_unsigned (next_frame,
+ gdbarch_pc_regnum (gdbarch));
}
static struct frame_id
set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh64);
set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
- set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
-
set_gdbarch_return_value (gdbarch, sh64_return_value);
- set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
- sh64_extract_struct_value_address);
set_gdbarch_skip_prologue (gdbarch, sh64_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
OSDN Git Service
