altera works, xilinx works with trivial bugs

[fpga-leon-mjpeg/leon-mjpeg.git] / grlib-gpl-1.0.22-b4095 / designs / leon3-altera-ep3c25-eek-mjpeg / leon3mp.vhd

diff --git a/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd b/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd
index e48e47b..1834302 100644 (file)
--- a/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd
+++ b/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd
@@ -804,7 +804,7 @@ begin
 ---   YCC-RGB translation module   ------------------------------------
 -----------------------------------------------------------------------
 
-  jpgycc : dctycc
+  jpgycc : huffdctycc
     generic map(memtech => memtech, shindex => 5, haddr => 16#B00#, hirq => 13, pindex => 14,
     paddr => 7, mhindex => 3 )
     port map(rst => rstn, clk => clkm, ahbmi => ahbmi,