add upsample+yccrgb+devdrv

[fpga-leon-mjpeg/leon-mjpeg.git] / grlib-gpl-1.0.22-b4095 / lib / kuri / mjpeg / mjpeg.vhd

diff --git a/grlib-gpl-1.0.22-b4095/lib/kuri/mjpeg/mjpeg.vhd b/grlib-gpl-1.0.22-b4095/lib/kuri/mjpeg/mjpeg.vhd
index c2150db..a66dfdd 100644 (file)
--- a/grlib-gpl-1.0.22-b4095/lib/kuri/mjpeg/mjpeg.vhd
+++ b/grlib-gpl-1.0.22-b4095/lib/kuri/mjpeg/mjpeg.vhd
@@ -12,6 +12,104 @@ use techmap.gencomp.all;
 
 package mjpeg is
 
+component upycc
+  generic (
+    memtech : integer := DEFMEMTECH;
+--    fifo_depth : integer := 32;
+    shindex : integer := 0;
+    haddr  : integer := 0;
+    hmask  : integer := 16#fff#;
+    hirq   : integer := 0;      
+    pindex : integer := 0;
+    paddr  : integer := 0;
+    pmask  : integer := 16#fff#;
+    mhindex : integer := 0;
+    chprot : integer := 3);
+   port (
+     rst    : in std_ulogic;
+     clk   : in std_ulogic;
+     ahbmi : in ahb_mst_in_type;
+     ahbmo : out ahb_mst_out_type;
+     ahbsi : in ahb_slv_in_type;
+     ahbso : out ahb_slv_out_type;
+     apbi  : in apb_slv_in_type;
+     apbo  : out apb_slv_out_type
+   );   
+end component;
+
+component yccambaif
+     generic (
+      memtech : integer := DEFMEMTECH;
+      shindex : integer := 0;
+      haddr  : integer := 0;
+      hmask  : integer := 16#fff#;
+      hirq   : integer := 0;      
+      pindex : integer := 0;
+      paddr  : integer := 0;
+      pmask  : integer := 16#fff#);
+   port (
+      rst   : in std_ulogic;
+      clk   : in std_ulogic;
+      ahbsi : in ahb_slv_in_type;
+      ahbso : out ahb_slv_out_type;
+      apbi  : in apb_slv_in_type;
+      apbo  : out apb_slv_out_type;
+      kready : in std_logic;
+      kstrobe : out std_logic;
+      kdata   : out std_logic_vector(7 downto 0);
+      samp_fact : out std_logic;
+      error : in std_logic;
+      xmcumax : out std_logic_vector(5 downto 0);
+      ymcumax : out std_logic_vector(4 downto 0);
+      incaddy  : out std_logic_vector(15 downto 0);
+      incaddmcux : out std_logic_vector(15 downto 0);
+      incaddmcuy : out std_logic_vector(10 downto 0);
+      fbstartadd : out std_logic_vector(31 downto 0);
+      startgen : out std_logic
+   );
+end component;
+
+component yccmemcont
+   generic (
+      memtech : integer := DEFMEMTECH);
+   port (
+      rst   : in std_ulogic;
+      clk   : in std_ulogic;
+      kready1  : out std_logic;
+      kstrobe1 : in std_logic;
+      kdata1   : in std_logic_vector(7 downto 0);
+      kready2  : in std_logic;
+      kstrobe2 : out std_logic;
+      kdata2   : out std_logic_vector(23 downto 0);
+      samp_fact : in std_logic;
+      error     : out std_logic
+   );
+end component;
+
+component yccrgb
+   generic (
+      memtech : integer := DEFMEMTECH;
+      hirq   : integer := 0;       
+      mhindex : integer := 0;
+      chprot : integer := 3);
+   port (
+      rst   : in std_ulogic;
+      clk   : in std_ulogic;
+      ahbmi : in ahb_mst_in_type;
+      ahbmo : out ahb_mst_out_type;
+      kready  : out std_logic;
+      kstrobe : in std_logic;
+      kdata   : in std_logic_vector(23 downto 0);
+      xmcumax : in std_logic_vector(5 downto 0);
+      ymcumax : in std_logic_vector(4 downto 0);
+      incaddy  : in std_logic_vector(15 downto 0);
+      incaddmcux : in std_logic_vector(15 downto 0);      
+      incaddmcuy : in std_logic_vector(10 downto 0);
+      fbstartadd : in std_logic_vector(31 downto 0);
+      startgen   : in std_logic
+   );
+end component;
+
 component yccrgbs 
    generic (
       memtech : integer := DEFMEMTECH;