#define _HAL_INIT_C_
#include <drv_types.h>
-#include <rtw_byteorder.h>
#include <rtw_efuse.h>
#include <rtl8723a_hal.h>
-#include "rtw_bt_mp.h"
-static void
+static VOID
_FWDownloadEnable(
IN PADAPTER padapter,
IN bool enable
return _BlockWrite(padapter,buffer,size);
}
-static void
+static VOID
_FillDummy(
u8* pFwBuf,
u32* pFwLen
u32 page, offset;
u8 *bufferPtr = (u8*)buffer;
-#ifdef CONFIG_PCI_HCI
- // 20100120 Joseph: Add for 88CE normal chip.
- // Fill in zero to make firmware image to dword alignment.
- _FillDummy(bufferPtr, &size);
-#endif
-
pageNums = size / MAX_PAGE_SIZE ;
//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));
remainSize = size % MAX_PAGE_SIZE;
}
RT_TRACE(_module_hal_init_c_, _drv_info_, ("-%s: 8051 reset success (%d)\n", __FUNCTION__, Delay));
- if ((Delay == 0) && IS_HARDWARE_TYPE_8723AU(padapter))
- {
+ if ((Delay == 0)) {
//force firmware reset
u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
}
}
-//
-#ifdef CONFIG_MP_INCLUDED
-
-int _WriteBTFWtoTxPktBuf8723A(
- IN PADAPTER Adapter,
- IN void * buffer,
- IN u4Byte FwBufLen
- )
-{
- int rtStatus = _SUCCESS;
- //u4Byte value32;
- //u1Byte numHQ, numLQ, numPubQ;//, txpktbuf_bndy;
- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
- //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
- u1Byte BcnValidReg;
- u1Byte count=0, DLBcnCount=0;
- pu1Byte FwbufferPtr = (pu1Byte)buffer;
- //PRT_TCB pTcb, ptempTcb;
- //PRT_TX_LOCAL_BUFFER pBuf;
- bool bRecover=false;
- pu1Byte ReservedPagePacket = NULL;
- pu1Byte pGenBufReservedPagePacket = NULL;
- u4Byte TotalPktLen;
- //u1Byte tmpReg422;
- //u1Byte u1bTmp;
- u8 *pframe;
- struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv);
- struct xmit_frame *pmgntframe;
- struct pkt_attrib *pattrib;
-
-#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE)
- TotalPktLen = FwBufLen;
-#else
- TotalPktLen = FwBufLen+pHalData->HWDescHeadLength;
-#endif
- pGenBufReservedPagePacket = rtw_zmalloc(TotalPktLen);//GetGenTempBuffer (Adapter, TotalPktLen);
- if (!pGenBufReservedPagePacket)
- return _FAIL;
-
- ReservedPagePacket = (u1Byte *)pGenBufReservedPagePacket;
-
- memset(ReservedPagePacket, 0, TotalPktLen);
-
-#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE)
- memcpy(ReservedPagePacket, FwbufferPtr, FwBufLen);
-
-#else
- PlatformMoveMemory(ReservedPagePacket+Adapter->HWDescHeadLength , FwbufferPtr, FwBufLen);
-#endif
-
- //---------------------------------------------------------
- // 1. Pause BCN
- //---------------------------------------------------------
- //Set REG_CR bit 8. DMA beacon by SW.
- // Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO.
- // De not remove this part on MERGE_TEMP. by tynli.
- //pHalData->RegCR_1 |= (BIT0);
- //PlatformEFIOWrite1Byte(Adapter, REG_CR+1, pHalData->RegCR_1);
-
- // Disable Hw protection for a time which revserd for Hw sending beacon.
- // Fix download reserved page packet fail that access collision with the protection time.
- // 2010.05.11. Added by tynli.
- SetBcnCtrlReg(Adapter, 0, BIT(3));
- SetBcnCtrlReg(Adapter, BIT(4), 0);
-
- // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.
- if(pHalData->RegFwHwTxQCtrl & BIT(6))
- bRecover=true;
- PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&( ~BIT(6))));
- pHalData->RegFwHwTxQCtrl &= (~BIT(6));
-
- //---------------------------------------------------------
- // 2. Adjust LLT table to an even boundary.
- //---------------------------------------------------------
-
- //---------------------------------------------------------
- // 3. Write Fw to Tx packet buffer by reseverd page.
- //---------------------------------------------------------
- do
- {
- // download rsvd page.
- // Clear beacon valid check bit.
- BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2);
- PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+2, BcnValidReg&(~BIT(0)));
-
- //BT patch is big, we should set 0x209 < 0x40 suggested from Gimmy
- RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n",
- PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1)));//209 < 0x40
- PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, 0x30);
- RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n",
- PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1)));
-
- /*---------------------------------------------------------
- tx reserved_page_packet
- ----------------------------------------------------------*/
- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) {
- rtStatus = _FAIL;
- goto exit;
- }
- //update attribute
- pattrib = &pmgntframe->attrib;
- update_mgntframe_attrib(Adapter, pattrib);
-
- pattrib->qsel = QSLT_BEACON;
- pattrib->pktlen = pattrib->last_txcmdsz = FwBufLen ;
-
- //memset(pmgntframe->buf_addr, 0, TotalPktLen+TXDESC_SIZE);
- //pmgntframe->buf_addr = ReservedPagePacket ;
-
- memcpy( (u8*) (pmgntframe->buf_addr + TXDESC_OFFSET), ReservedPagePacket, FwBufLen);
- DBG_871X("===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d ", (FwBufLen + TXDESC_OFFSET));
-
- dump_mgntframe(Adapter, pmgntframe);
-
- // check rsvd page download OK.
- BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2);
- while(!(BcnValidReg & BIT(0)) && count <200)
- {
- count++;
- //PlatformSleepUs(10);
- rtw_msleep_os(1);
- BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2);
- RT_TRACE(_module_mp_, _drv_info_,("Poll 0x20A = %x\n", BcnValidReg));
- }
- DLBcnCount++;
- DBG_871X("##0x208:%08x,0x210=%08x\n",PlatformEFIORead4Byte(Adapter, REG_TDECTRL),PlatformEFIORead4Byte(Adapter, 0x210));
- }while((!(BcnValidReg&BIT(0))) && DLBcnCount<5);
-
-
- if(DLBcnCount >=5){
- DBG_871X(" check rsvd page download OK DLBcnCount =%d \n",DLBcnCount);
- rtStatus = _FAIL;
- goto exit;
- }
-
- if(!(BcnValidReg&BIT(0)))
- {
- DBG_871X("_WriteFWtoTxPktBuf(): 1 Download RSVD page failed!\n");
- rtStatus = _FAIL;
- goto exit;
- }
-
- //---------------------------------------------------------
- // 4. Set Tx boundary to the initial value
- //---------------------------------------------------------
-
-
- //---------------------------------------------------------
- // 5. Reset beacon setting to the initial value.
- // After _CheckWLANFwPatchBTFwReady().
- //---------------------------------------------------------
-
-exit:
-
- if(pGenBufReservedPagePacket)
- {
- DBG_871X("_WriteBTFWtoTxPktBuf8723A => rtw_mfree pGenBufReservedPagePacket!\n");
- rtw_mfree((u8*)pGenBufReservedPagePacket, TotalPktLen);
- }
- return rtStatus;
-}
-
-
-extern s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
-
-//
-// Description: Determine the contents of H2C BT_FW_PATCH Command sent to FW.
-// 2011.10.20 by tynli
-//
-void
-SetFwBTFwPatchCmd(
- IN PADAPTER Adapter,
- IN u2Byte FwSize
- )
-{
- u1Byte u1BTFwPatchParm[H2C_BT_FW_PATCH_LEN]={0};
-
- RT_TRACE(_module_mp_, _drv_notice_,("SetFwBTFwPatchCmd(): FwSize = %d\n", FwSize));
-
- //bit1: 1---24k, 0----16k
- //SET_H2CCMD_BT_FW_PATCH_ENABLE(u1BTFwPatchParm, 0x03);
-
- SET_H2CCMD_BT_FW_PATCH_ENABLE(u1BTFwPatchParm, 1);
-
- SET_H2CCMD_BT_FW_PATCH_SIZE(u1BTFwPatchParm, FwSize);
-
- u1BTFwPatchParm[0] |= BIT1;
-
- FillH2CCmd(Adapter, H2C_BT_FW_PATCH, H2C_BT_FW_PATCH_LEN, u1BTFwPatchParm);
-
- RT_TRACE(_module_mp_, _drv_notice_,("<----SetFwBTFwPatchCmd(): FwSize = %d \n", FwSize));
-}
-
-void
-SetFwBTPwrCmd(
- IN PADAPTER Adapter,
- IN u1Byte PwrIdx
- )
-{
- u1Byte u1BTPwrIdxParm[H2C_BT_PWR_FORCE_LEN]={0};
-
- RT_TRACE(_module_mp_, _drv_info_,("SetFwBTPwrCmd(): idx = %d\n", PwrIdx));
- SET_H2CCMD_BT_PWR_IDX(u1BTPwrIdxParm, PwrIdx);
-
- RT_TRACE(_module_mp_, _drv_info_,("SetFwBTPwrCmd(): %x %x %x\n",
- u1BTPwrIdxParm[0],u1BTPwrIdxParm[1],u1BTPwrIdxParm[2]));
-
- FillH2CCmd(Adapter, FORCE_BT_TX_PWR_EID, H2C_BT_PWR_FORCE_LEN, u1BTPwrIdxParm);
-}
-
-//
-// Description: WLAN Fw will write BT Fw to BT XRAM and signal driver.
-//
-// 2011.10.20. by tynli.
-//
-void
-_CheckWLANFwPatchBTFwReady(
- IN PADAPTER Adapter
-)
-{
- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
- u4Byte count=0;
- u1Byte u1bTmp;
-
- //---------------------------------------------------------
- // Check if BT FW patch procedure is ready.
- //---------------------------------------------------------
- do{
- u1bTmp = PlatformEFIORead1Byte(Adapter, REG_MCUFWDL+1);
- if(u1bTmp&BIT(7))
- break;
-
- count++;
- RT_TRACE(_module_mp_, _drv_info_,("0x81=%x, wait for 50 ms (%d) times.\n",
- u1bTmp, count));
- rtw_msleep_os(50); // 50ms
- }while(!(u1bTmp&BIT(7)) && count < 50);
-
- RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():"
- " Polling ready bit 0x81[7] for %d times.\n", count));
-
- if(count >= 50)
- {
- RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():"
- " Polling ready bit 0x81[7] FAIL!!\n"));
- }
-
- //---------------------------------------------------------
- // Reset beacon setting to the initial value.
- //---------------------------------------------------------
- SetBcnCtrlReg(Adapter, BIT(3), 0);
- SetBcnCtrlReg(Adapter, 0, BIT(4));
-
- // To make sure that if there exists an adapter which would like to send beacon.
- // If exists, the origianl value of 0x422[6] will be 1, we should check this to
- // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
- // the beacon cannot be sent by HW.
- // 2010.06.23. Added by tynli.
- PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT(6)));
- pHalData->RegFwHwTxQCtrl |= BIT(6);
-
-}
-
-int
-FirmwareDownloadBT(IN PADAPTER Adapter, PRT_FIRMWARE_8723A pFirmware)
-{
- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
- int rtStatus = _SUCCESS;
-
- // BT pacth
- u1Byte *BTFwImage;
- u4Byte BTFwImageLen;
-
- u1Byte *pBTFirmwareBuf;
- u4Byte BTFirmwareLen;
- //
- // Patch BT Fw. Download BT RAM code to Tx packet buffer. Added by tynli. 2011.10.
- // Only for 8723AE for Toshiba. Suggested by SD1 Jackie.
- //
- if( !(IS_HARDWARE_TYPE_8723A(Adapter)) && IS_8723A_B_CUT(pHalData->VersionID))
- return _FAIL ; //&& (Adapter->registrypriv.bBtFwSupport)))
-
- if (Adapter->bBTFWReady){
- DBG_871X("BT Firmware is ready!!\n");
- return _FAIL;
- }
- BTFwImage = (pu1Byte)Rtl8723EFwBTImgArray;
- BTFwImageLen = Rtl8723EBTImgArrayLength;
- DBG_871X("BT Firmware is size= %zu!!\n",sizeof(Rtl8723EFwBTImgArray));
-
- // Download BT patch Fw.
- RT_TRACE(_module_mp_, _drv_info_,("Download BT Fw (patch version) from header.\n"));
- DBG_871X("Download BT Fw (patch version) from header.\n");
-
-#ifdef CONFIG_EMBEDDED_FWIMG
- pFirmware->szBTFwBuffer = BTFwImage;
- DBG_871X("CONFIG_EMBEDDED_FWIMG pFirmware->szBTFwBuffer = BTFwImage;\n");
-#else
- DBG_871X("memcpy BTFwImage to pFirmware->szBTFwBuffer.\n");
- memcpy(pFirmware->szBTFwBuffer, (void *)BTFwImage, BTFwImageLen);
-#endif
- pFirmware->ulBTFwLength = BTFwImageLen;
- RT_TRACE(_module_mp_, _drv_notice_,("Download BT Fw (patch version) from header "
- "pFirmware->ulBTFwLength:%d.\n", pFirmware->ulBTFwLength));
-
- // BT FW
- pBTFirmwareBuf = pFirmware->szBTFwBuffer;
- BTFirmwareLen = pFirmware->ulBTFwLength;
-
- //for h2c cam here should be set to true
- Adapter->bFWReady = true;
- DBG_871X("FirmwareDownloadBT to _WriteBTFWtoTxPktBuf8723A !\n");
- rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf, BTFirmwareLen);
- if(rtStatus != _SUCCESS) {
- RT_TRACE(_module_mp_, _drv_info_,("BT Firmware download to Tx packet buffer fail!\n"));
- DBG_871X("BT Firmware download to Tx packet buffer fail!\n");
- } else {
- Adapter->bBTFWReady = true;
- SetFwBTFwPatchCmd(Adapter, (u2Byte)BTFirmwareLen);
- _CheckWLANFwPatchBTFwReady(Adapter);
- }
- DBG_871X("<===FirmwareDownloadBT(),return %s!\n",rtStatus?"SUCCESS":"FAIL");
- return rtStatus;
-}
-
-#endif
#ifdef CONFIG_FILE_FWIMG
extern char *rtw_fw_file_path;
RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__));
- pFirmware = (PRT_FIRMWARE_8723A)rtw_zmalloc(sizeof(RT_FIRMWARE_8723A));
- pBTFirmware = (PRT_FIRMWARE_8723A)rtw_zmalloc(sizeof(RT_FIRMWARE_8723A));
+ pFirmware = (PRT_FIRMWARE_8723A)kzalloc(sizeof(RT_FIRMWARE_8723A),
+ GFP_KERNEL);
+ pBTFirmware = (PRT_FIRMWARE_8723A)kzalloc(sizeof(RT_FIRMWARE_8723A),
+ GFP_KERNEL);
if(!pFirmware||!pBTFirmware)
{
goto Exit;
}
- if (IS_HARDWARE_TYPE_8723A(padapter))
- {
- if (IS_8723A_A_CUT(pHalData->VersionID))
- {
- pFwImageFileName = R8723FwImageFileName_UMC;
- FwImage = (u8*)Rtl8723_FwImageArray;
- FwImageLen = Rtl8723_ImgArrayLength;
- RT_TRACE(_module_hal_init_c_, _drv_info_, ("rtl8723a_FirmwareDownload: R8723FwImageArray_UMC for RTL8723A A CUT\n"));
- }
- else if (IS_8723A_B_CUT(pHalData->VersionID))
- {
- if(padapter->registrypriv.mp_mode == 1)
- {
- FwImage = (u8*)Rtl8723_FwUMCBCutMPImageArray;
- FwImageLen = Rtl8723_UMCBCutMPImgArrayLength;
- DBG_871X(" Rtl8723_FwUMCBCutMPImageArray for RTL8723A B CUT\n");
- }
- else
- {
- // WLAN Fw.
- FwImage = (u8*)Rtl8723_FwUMCBCutImageArray;
- FwImageLen = Rtl8723_UMCBCutImgArrayLength;
- DBG_871X(" Rtl8723_FwUMCBCutImageArray for RTL8723A B CUT\n");
- }
- pFwImageFileName = R8723FwImageFileName_UMC_B;
- }
- else
- {
- // <Roger_TODO> We should download proper RAM Code here to match the ROM code.
- RT_TRACE(_module_hal_init_c_, _drv_err_, ("%s: unknow version!\n", __FUNCTION__));
-// return RT_STATUS_FAILURE;
- rtStatus = _FAIL;
- goto Exit;
+ if (IS_8723A_A_CUT(pHalData->VersionID)) {
+ pFwImageFileName = R8723FwImageFileName_UMC;
+ FwImage = (u8*)Rtl8723_FwImageArray;
+ FwImageLen = Rtl8723_ImgArrayLength;
+ RT_TRACE(_module_hal_init_c_, _drv_info_, ("rtl8723a_FirmwareDownload: R8723FwImageArray_UMC for RTL8723A A CUT\n"));
+ } else if (IS_8723A_B_CUT(pHalData->VersionID)) {
+ // WLAN Fw.
+ if (padapter->registrypriv.wifi_spec == 1) {
+ FwImage = (u8*)Rtl8723_FwUMCBCutImageArrayWithoutBT;
+ FwImageLen = Rtl8723_UMCBCutImgArrayWithoutBTLength;
+ DBG_8723A(" Rtl8723_FwUMCBCutImageArrayWithoutBT for RTL8723A B CUT\n");
+ } else {
+#ifdef CONFIG_BT_COEXIST
+ FwImage = (u8*)Rtl8723_FwUMCBCutImageArrayWithBT;
+ FwImageLen = Rtl8723_UMCBCutImgArrayWithBTLength;
+ DBG_8723A(" Rtl8723_FwUMCBCutImageArrayWithBT for RTL8723A B CUT\n");
+#else
+ FwImage = (u8*)Rtl8723_FwUMCBCutImageArrayWithoutBT;
+ FwImageLen = Rtl8723_UMCBCutImgArrayWithoutBTLength;
+ DBG_8723A(" Rtl8723_FwUMCBCutImageArrayWithoutBT for RTL8723A B CUT\n");
+#endif
}
- }
- else
- {
- RT_TRACE(_module_hal_init_c_, _drv_err_, ("%s: unknow chip!\n", __FUNCTION__));
+ pFwImageFileName = R8723FwImageFileName_UMC_B;
+ } else {
+ // <Roger_TODO> We should download proper RAM Code here to match the ROM code.
+ RT_TRACE(_module_hal_init_c_, _drv_err_, ("%s: unknow version!\n", __FUNCTION__));
rtStatus = _FAIL;
goto Exit;
}
-// RT_TRACE(_module_hal_init_c_, _drv_err_, ("rtl8723a_FirmwareDownload: %s\n", pFwImageFileName));
- #ifdef CONFIG_FILE_FWIMG
- if(rtw_is_file_readable(rtw_fw_file_path) == true)
+#ifdef CONFIG_FILE_FWIMG
+ if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE)
{
- DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path);
+ DBG_8723A("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path);
pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg.
}
else
- #endif //CONFIG_FILE_FWIMG
+#endif //CONFIG_FILE_FWIMG
{
- DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__);
+ DBG_8723A("%s accquire FW from embedded image\n", __FUNCTION__);
pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
}
switch(pFirmware->eFWSource)
{
case FW_SOURCE_IMG_FILE:
- #ifdef CONFIG_FILE_FWIMG
+#ifdef CONFIG_FILE_FWIMG
rtStatus = rtw_retrive_from_file(rtw_fw_file_path, fw_buffer_8723a, FW_8723A_SIZE);
pFirmware->ulFwLength = rtStatus>=0?rtStatus:0;
pFirmware->szFwBuffer = fw_buffer_8723a;
- #endif //CONFIG_FILE_FWIMG
+#endif //CONFIG_FILE_FWIMG
if(pFirmware->ulFwLength <= 0)
{
break;
}
- #ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file...
+#ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file...
if(pFirmware->ulFwLength > 0)
{
rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength);
}
- #endif
+#endif
pFirmwareBuf = pFirmware->szFwBuffer;
FirmwareLen = pFirmware->ulFwLength;
pHalData->FirmwareSubVersion = pFwHdr->Subversion;
pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature);
- DBG_871X("%s: fw_ver=%d fw_subver=%d sig=0x%x\n",
+ DBG_8723A("%s: fw_ver=%d fw_subver=%d sig=0x%x\n",
__FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature);
if (IS_FW_HEADER_EXIST(pFwHdr))
rtw_write8(padapter, REG_MCUFWDL, 0x00);
}
- _FWDownloadEnable(padapter, true);
+ _FWDownloadEnable(padapter, _TRUE);
fwdl_start_time = rtw_get_current_time();
while(1) {
//reset the FWDL chksum
)
break;
- DBG_871X("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n", __FUNCTION__
+ DBG_8723A("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n", __FUNCTION__
, writeFW_retry
, rtw_get_passing_time_ms(fwdl_start_time)
);
}
- _FWDownloadEnable(padapter, false);
+ _FWDownloadEnable(padapter, _FALSE);
if(_SUCCESS != rtStatus){
- DBG_871X("DL Firmware failed!\n");
+ DBG_8723A("DL Firmware failed!\n");
goto Exit;
}
}
RT_TRACE(_module_hal_init_c_, _drv_info_, ("Firmware is ready to run!\n"));
-#ifdef CONFIG_MP_INCLUDED//BT_MP
- if (padapter->registrypriv.mp_mode == 1)
- {
- DBG_871X("rtl8723a_FirmwareDownload go to FirmwareDownloadBT !\n");
- FirmwareDownloadBT(padapter, pBTFirmware);
- }
-#endif
-
Exit:
- DBG_871X("rtl8723a_FirmwareDownload Exit rtw_mfree pFirmware !\n");
+ DBG_8723A("rtl8723a_FirmwareDownload Exit kfree pFirmware !\n");
if (pFirmware)
- rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8723A));
- DBG_871X("rtl8723a_FirmwareDownload Exit rtw_mfree pBTFirmware !\n");
+ kfree(pFirmware);
+ DBG_8723A("rtl8723a_FirmwareDownload Exit kmfree pBTFirmware !\n");
if (pBTFirmware)
- rtw_mfree((u8*)pBTFirmware, sizeof(RT_FIRMWARE_8723A));
+ kfree(pBTFirmware);
//RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n"));
return rtStatus;
}
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
// Init Fw LPS related.
- padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
+ padapter->pwrctrlpriv.bFwCurrentInPSMode = _FALSE;
// Init H2C counter. by tynli. 2009.12.09.
pHalData->LastHMEBoxNum = 0;
// pHalData->H2CQueueHead = 0;
// pHalData->H2CQueueTail = 0;
-// pHalData->H2CStopInsertQueue = false;
+// pHalData->H2CStopInsertQueue = _FALSE;
}
static void rtl8723a_free_hal_data(PADAPTER padapter)
{
_func_enter_;
if (padapter->HalData) {
- rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE));
+ kfree(padapter->HalData);
padapter->HalData = NULL;
}
_func_exit_;
u8 bank,
u8 bPseudoTest)
{
- u8 bRet = false;
+ u8 bRet = _FALSE;
u32 value32 = 0;
#ifdef HAL_EFUSE_MEMORY
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
#endif
- DBG_8192C("%s: Efuse switch bank to %d\n", __FUNCTION__, bank);
+ DBG_8723A("%s: Efuse switch bank to %d\n", __FUNCTION__, bank);
if (bPseudoTest)
{
#ifdef HAL_EFUSE_MEMORY
#else
fakeEfuseBank = bank;
#endif
- bRet = true;
+ bRet = _TRUE;
}
else
{
value32 = rtw_read32(padapter, EFUSE_TEST);
- bRet = true;
+ bRet = _TRUE;
switch (bank)
{
case 0:
break;
default:
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
- bRet = false;
+ bRet = _FALSE;
break;
}
rtw_write32(padapter, EFUSE_TEST, value32);
u8 tempval;
u16 tmpV16;
- if (PwrState == true)
+ if (PwrState == _TRUE)
{
rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
rtw_write16(padapter, REG_SYS_CLKR, tmpV16);
}
- if (bWrite == true)
+ if (bWrite == _TRUE)
{
// Enable LDO 2.5V before read/write action
tempval = rtw_read8(padapter, EFUSE_TEST+3);
{
rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
- if (bWrite == true) {
+ if (bWrite == _TRUE) {
// Disable LDO 2.5V after read/write action
tempval = rtw_read8(padapter, EFUSE_TEST+3);
rtw_write8(padapter, EFUSE_TEST+3, (tempval & 0x7F));
u16 _offset,
u16 _size_byte,
u8 *pbuf,
- bool bPseudoTest)
+ u8 bPseudoTest)
{
#ifdef HAL_EFUSE_MEMORY
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
//
if ((_offset+_size_byte) > EFUSE_MAP_LEN_8723A)
{
- DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte);
+ DBG_8723A("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte);
return;
}
- efuseTbl = (u8*)rtw_malloc(EFUSE_MAP_LEN_8723A);
+ efuseTbl = (u8*)kmalloc(EFUSE_MAP_LEN_8723A, GFP_KERNEL);
if (efuseTbl == NULL)
{
- DBG_8192C("%s: alloc efuseTbl fail!\n", __FUNCTION__);
+ DBG_8723A("%s: alloc efuseTbl fail!\n", __FUNCTION__);
return;
}
// 0xff will be efuse default value instead of 0x00.
ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
if (efuseHeader == 0xFF)
{
- DBG_8192C("%s: data end at address=%#x\n", __FUNCTION__, eFuse_Addr);
+ DBG_8723A("%s: data end at address=%#x\n", __FUNCTION__, eFuse_Addr);
break;
}
-// DBG_8192C("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseHeader);
+// DBG_8723A("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseHeader);
// Check PG header for section num.
if (EXT_HEADER(efuseHeader)) //extended header
{
offset = GET_HDR_OFFSET_2_0(efuseHeader);
-// DBG_8192C("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset_2_0);
+// DBG_8723A("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset_2_0);
ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
-// DBG_8192C("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseExtHdr);
+// DBG_8723A("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseExtHdr);
if (ALL_WORDS_DISABLED(efuseExtHdr))
{
continue;
{
u16 addr;
// Get word enable value from PG header
-// DBG_8192C("%s: Offset=%d Worden=0x%X\n", __FUNCTION__, offset, wden);
+// DBG_8723A("%s: Offset=%d Worden=0x%X\n", __FUNCTION__, offset, wden);
addr = offset * PGPKT_DATA_SIZE;
for (i=0; i<EFUSE_MAX_WORD_UNIT; i++)
if (!(wden & (0x01<<i)))
{
ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
+// DBG_8723A("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
efuseTbl[addr] = efuseData;
ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
+// DBG_8723A("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
efuseTbl[addr+1] = efuseData;
}
addr += 2;
}
else
{
- DBG_8192C(KERN_ERR "%s: offset(%d) is illegal!!\n", __FUNCTION__, offset);
+ DBG_8723A(KERN_ERR "%s: offset(%d) is illegal!!\n", __FUNCTION__, offset);
eFuse_Addr += Efuse_CalculateWordCnts(wden)*2;
}
}
}
if (efuseTbl)
- rtw_mfree(efuseTbl, EFUSE_MAP_LEN_8723A);
+ kfree(efuseTbl);
}
-static void
+static VOID
hal_ReadEFuse_BT(
PADAPTER padapter,
u16 _offset,
//
if ((_offset+_size_byte) > EFUSE_BT_MAP_LEN)
{
- DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte);
+ DBG_8723A("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte);
return;
}
- efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN);
+ efuseTbl = kmalloc(EFUSE_BT_MAP_LEN, GFP_KERNEL);
if (efuseTbl == NULL) {
- DBG_8192C("%s: efuseTbl malloc fail!\n", __FUNCTION__);
+ DBG_8723A("%s: efuseTbl malloc fail!\n", __FUNCTION__);
return;
}
// 0xff will be efuse default value instead of 0x00.
for (bank=1; bank<EFUSE_MAX_BANK; bank++)
{
- if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == false)
+ if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE)
{
- DBG_8192C("%s: hal_EfuseSwitchToBank Fail!!\n", __FUNCTION__);
+ DBG_8723A("%s: hal_EfuseSwitchToBank Fail!!\n", __FUNCTION__);
goto exit;
}
{
ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
if (efuseHeader == 0xFF) break;
-// DBG_8192C("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseHeader);
+// DBG_8723A("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseHeader);
// Check PG header for section num.
if (EXT_HEADER(efuseHeader)) //extended header
{
offset = GET_HDR_OFFSET_2_0(efuseHeader);
-// DBG_8192C("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset_2_0);
+// DBG_8723A("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset_2_0);
ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseExtHdr);
+// DBG_8723A("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseExtHdr);
if (ALL_WORDS_DISABLED(efuseExtHdr))
{
continue;
u16 addr;
// Get word enable value from PG header
-// DBG_8192C("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden);
+// DBG_8723A("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden);
addr = offset * PGPKT_DATA_SIZE;
for (i=0; i<EFUSE_MAX_WORD_UNIT; i++)
if (!(wden & (0x01<<i)))
{
ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
+// DBG_8723A("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
efuseTbl[addr] = efuseData;
ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
+// DBG_8723A("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData);
efuseTbl[addr+1] = efuseData;
}
addr += 2;
}
else
{
- DBG_8192C(KERN_ERR "%s: offset(%d) is illegal!!\n", __FUNCTION__, offset);
+ DBG_8723A(KERN_ERR "%s: offset(%d) is illegal!!\n", __FUNCTION__, offset);
eFuse_Addr += Efuse_CalculateWordCnts(wden)*2;
}
}
if ((eFuse_Addr-1) < total)
{
- DBG_8192C("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr-1);
+ DBG_8723A("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr-1);
break;
}
}
exit:
if (efuseTbl)
- rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN);
+ kfree(efuseTbl);
}
static void
static u16
hal_EfuseGetCurrentSize_WiFi(
PADAPTER padapter,
- u8 bPseudoTest)
+ bool bPseudoTest)
{
#ifdef HAL_EFUSE_MEMORY
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
{
rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8*)&efuse_addr);
}
- DBG_8192C("%s: start_efuse_addr=0x%X\n", __FUNCTION__, efuse_addr);
+ DBG_8723A("%s: start_efuse_addr=0x%X\n", __FUNCTION__, efuse_addr);
// switch bank back to bank 0 for later BT and wifi use.
hal_EfuseSwitchToBank(padapter, 0, bPseudoTest);
while (AVAILABLE_EFUSE_ADDR(efuse_addr))
{
- if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == false)
+ if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == _FALSE)
{
- DBG_8192C(KERN_ERR "%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr);
+ DBG_8723A(KERN_ERR "%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr);
break;
}
{
rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8*)&efuse_addr);
}
- DBG_8192C("%s: CurrentSize=%d\n", __FUNCTION__, efuse_addr);
+ DBG_8723A("%s: CurrentSize=%d\n", __FUNCTION__, efuse_addr);
return efuse_addr;
}
static u16
hal_EfuseGetCurrentSize_BT(
PADAPTER padapter,
- u8 bPseudoTest)
+ bool bPseudoTest)
{
#ifdef HAL_EFUSE_MEMORY
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
efuse_addr = (u16)((btusedbytes%EFUSE_BT_REAL_BANK_CONTENT_LEN));
startBank = (u8)(1+(btusedbytes/EFUSE_BT_REAL_BANK_CONTENT_LEN));
- DBG_8192C("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr);
+ DBG_8723A("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr);
EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &retU2, bPseudoTest);
for (bank=startBank; bank<EFUSE_MAX_BANK; bank++)
{
- if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == false)
+ if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE)
{
- DBG_8192C(KERN_ERR "%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank);
+ DBG_8723A(KERN_ERR "%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank);
bank = EFUSE_MAX_BANK;
break;
}
while (AVAILABLE_EFUSE_ADDR(efuse_addr))
{
- if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == false)
+ if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == _FALSE)
{
- DBG_8192C(KERN_ERR "%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr);
+ DBG_8723A(KERN_ERR "%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr);
bank = EFUSE_MAX_BANK;
break;
}
rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8*)&retU2);
}
- DBG_8192C("%s: CurrentSize=%d\n", __FUNCTION__, retU2);
+ DBG_8723A("%s: CurrentSize=%d\n", __FUNCTION__, retU2);
return retU2;
}
u8 tmpdata[PGPKT_DATA_SIZE];
-// DBG_8192C("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en);
+// DBG_8723A("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en);
memset(tmpdata, 0xFF, PGPKT_DATA_SIZE);
if (!(word_en & BIT(0)))
u8 *data,
bool bPseudoTest)
{
- u8 bDataEmpty = true;
+ u8 bDataEmpty = _TRUE;
u8 efuse_data, word_cnts=0;
u16 efuse_addr=0;
u8 hoffset=0, hworden=0;
if (data == NULL)
- return false;
+ return _FALSE;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, &max_section, bPseudoTest);
if (offset > max_section)
{
- DBG_8192C("%s: Packet offset(%d) is illegal(>%d)!\n", __FUNCTION__, offset, max_section);
- return false;
+ DBG_8723A("%s: Packet offset(%d) is illegal(>%d)!\n", __FUNCTION__, offset, max_section);
+ return _FALSE;
}
memset(data, 0xFF, PGPKT_DATA_SIZE);
- ret = true;
+ ret = _TRUE;
//
// <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
//
while (AVAILABLE_EFUSE_ADDR(efuse_addr))
{
- if (efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest) == false)
+ if (efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest) == _FALSE)
{
- ret = false;
+ ret = _FALSE;
break;
}
efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest);
if (ALL_WORDS_DISABLED(efuse_data))
{
- DBG_8192C("%s: Error!! All words disabled!\n", __FUNCTION__);
+ DBG_8723A("%s: Error!! All words disabled!\n", __FUNCTION__);
continue;
}
if (!(hworden & (0x01<<i)))
{
ReadEFuseByte(padapter, efuse_addr++, &efuse_data, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data);
+// DBG_8723A("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data);
data[i*2] = efuse_data;
ReadEFuseByte(padapter, efuse_addr++, &efuse_data, bPseudoTest);
-// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data);
+// DBG_8723A("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data);
data[(i*2)+1] = efuse_data;
}
}
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &max_available, bPseudoTest);
-// DBG_8192C("%s: max_available=%d\n", __FUNCTION__, max_available);
+// DBG_8723A("%s: max_available=%d\n", __FUNCTION__, max_available);
current_size = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
if (current_size >= max_available)
{
- DBG_8192C("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available);
- return false;
+ DBG_8723A("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available);
+ return _FALSE;
}
- return true;
+ return _TRUE;
}
static void
pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
}
+#if 0
+static u8
+wordEnMatched(
+ PPGPKT_STRUCT pTargetPkt,
+ PPGPKT_STRUCT pCurPkt,
+ u8 *pWden)
+{
+ u8 match_word_en = 0x0F; // default all words are disabled
+ u8 i;
+
+ // check if the same words are enabled both target and current PG packet
+ if (((pTargetPkt->word_en & BIT(0)) == 0) &&
+ ((pCurPkt->word_en & BIT(0)) == 0))
+ {
+ match_word_en &= ~BIT(0); // enable word 0
+ }
+ if (((pTargetPkt->word_en & BIT(1)) == 0) &&
+ ((pCurPkt->word_en & BIT(1)) == 0))
+ {
+ match_word_en &= ~BIT(1); // enable word 1
+ }
+ if (((pTargetPkt->word_en & BIT(2)) == 0) &&
+ ((pCurPkt->word_en & BIT(2)) == 0))
+ {
+ match_word_en &= ~BIT(2); // enable word 2
+ }
+ if (((pTargetPkt->word_en & BIT(3)) == 0) &&
+ ((pCurPkt->word_en & BIT(3)) == 0))
+ {
+ match_word_en &= ~BIT(3); // enable word 3
+ }
+
+ *pWden = match_word_en;
+
+ if (match_word_en != 0xf)
+ return _TRUE;
+ else
+ return _FALSE;
+}
+
+static u8
+hal_EfuseCheckIfDatafollowed(
+ PADAPTER pAdapter,
+ u8 word_cnts,
+ u16 startAddr,
+ u8 bPseudoTest)
+{
+ u8 bRet=_FALSE;
+ u8 i, efuse_data;
+
+ for (i=0; i<(word_cnts*2); i++)
+ {
+ if (efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest) == _FALSE)
+ {
+ DBG_8723A("%s: efuse_OneByteRead FAIL!!\n", __FUNCTION__);
+ bRet = _TRUE;
+ break;
+ }
+
+ if (efuse_data != 0xFF)
+ {
+ bRet = _TRUE;
+ break;
+ }
+ }
+
+ return bRet;
+}
+#endif
+
static u8
hal_EfusePartialWriteCheck(
PADAPTER padapter,
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
- u8 bRet=false;
+ u8 bRet=_FALSE;
u16 startAddr=0, efuse_max_available_len=0, efuse_max=0;
u8 efuse_data=0;
+#if 0
+ u8 i, cur_header=0;
+ u8 new_wden=0, matched_wden=0, badworden=0;
+ PGPKT_STRUCT curPkt;
+#endif
+
+
EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, bPseudoTest);
EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, &efuse_max, bPseudoTest);
}
}
startAddr %= efuse_max;
-// DBG_8192C("%s: startAddr=%#X\n", __FUNCTION__, startAddr);
+// DBG_8723A("%s: startAddr=%#X\n", __FUNCTION__, startAddr);
while (1)
{
if (startAddr >= efuse_max_available_len)
{
- bRet = false;
- DBG_8192C("%s: startAddr(%d) >= efuse_max_available_len(%d)\n",
+ bRet = _FALSE;
+ DBG_8723A("%s: startAddr(%d) >= efuse_max_available_len(%d)\n",
__FUNCTION__, startAddr, efuse_max_available_len);
break;
}
if (efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF))
{
#if 1
- bRet = false;
- DBG_8192C("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n",
+ bRet = _FALSE;
+ DBG_8723A("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n",
__FUNCTION__, startAddr, efuse_data);
break;
#else
efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest);
if (ALL_WORDS_DISABLED(efuse_data))
{
- DBG_8192C("%s: Error condition, all words disabled!", __FUNCTION__);
- bRet = false;
+ DBG_8723A("%s: Error condition, all words disabled!", __FUNCTION__);
+ bRet = _FALSE;
break;
}
else
// if same header is found but no data followed
// write some part of data followed by the header.
if ((curPkt.offset == pTargetPkt->offset) &&
- (hal_EfuseCheckIfDatafollowed(padapter, curPkt.word_cnts, startAddr+1, bPseudoTest) == false) &&
- wordEnMatched(pTargetPkt, &curPkt, &matched_wden) == true)
+ (hal_EfuseCheckIfDatafollowed(padapter, curPkt.word_cnts, startAddr+1, bPseudoTest) == _FALSE) &&
+ wordEnMatched(pTargetPkt, &curPkt, &matched_wden) == _TRUE)
{
- DBG_8192C("%s: Need to partial write data by the previous wrote header\n", __FUNCTION__);
+ DBG_8723A("%s: Need to partial write data by the previous wrote header\n", __FUNCTION__);
// Here to write partial data
badworden = Efuse_WordEnableDataWrite(padapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
if (badworden != 0x0F)
if (!PgWriteSuccess)
{
- bRet = false; // write fail, return
+ bRet = _FALSE; // write fail, return
break;
}
}
{
// not used header, 0xff
*pAddr = startAddr;
-// DBG_8192C("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr));
- bRet = true;
+// DBG_8723A("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr));
+ bRet = _TRUE;
break;
}
}
PPGPKT_STRUCT pTargetPkt,
u8 bPseudoTest)
{
- u8 bRet=false;
+ u8 bRet=_FALSE;
u8 pg_header=0, tmp_header=0;
u16 efuse_addr=*pAddr;
u8 repeatcnt=0;
-// DBG_8192C("%s\n", __FUNCTION__);
+// DBG_8723A("%s\n", __FUNCTION__);
pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
do {
if (tmp_header != 0xFF) break;
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
{
- DBG_8192C("%s: Repeat over limit for pg_header!!\n", __FUNCTION__);
- return false;
+ DBG_8723A("%s: Repeat over limit for pg_header!!\n", __FUNCTION__);
+ return _FALSE;
}
} while (1);
if (tmp_header != pg_header)
{
- DBG_8192C(KERN_ERR "%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
- return false;
+ DBG_8723A(KERN_ERR "%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
+ return _FALSE;
}
*pAddr = efuse_addr;
- return true;
+ return _TRUE;
}
static u8
u8 repeatcnt=0;
-// DBG_8192C("%s\n", __FUNCTION__);
+// DBG_8723A("%s\n", __FUNCTION__);
EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &efuse_max_available_len, bPseudoTest);
efuse_addr = *pAddr;
if (efuse_addr >= efuse_max_available_len)
{
- DBG_8192C("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len);
- return false;
+ DBG_8723A("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len);
+ return _FALSE;
}
pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
-// DBG_8192C("%s: pg_header=0x%x\n", __FUNCTION__, pg_header);
+// DBG_8723A("%s: pg_header=0x%x\n", __FUNCTION__, pg_header);
do {
efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest);
if (tmp_header != 0xFF) break;
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
{
- DBG_8192C("%s: Repeat over limit for pg_header!!\n", __FUNCTION__);
- return false;
+ DBG_8723A("%s: Repeat over limit for pg_header!!\n", __FUNCTION__);
+ return _FALSE;
}
} while (1);
if (tmp_header != pg_header)
{
- DBG_8192C(KERN_ERR "%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
- return false;
+ DBG_8723A(KERN_ERR "%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
+ return _FALSE;
}
// to write ext_header
if (tmp_header != 0xFF) break;
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
{
- DBG_8192C("%s: Repeat over limit for ext_header!!\n", __FUNCTION__);
- return false;
+ DBG_8723A("%s: Repeat over limit for ext_header!!\n", __FUNCTION__);
+ return _FALSE;
}
} while (1);
if (tmp_header != pg_header) //offset PG fail
{
- DBG_8192C(KERN_ERR "%s: PG EXT Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
- return false;
+ DBG_8723A(KERN_ERR "%s: PG EXT Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
+ return _FALSE;
}
*pAddr = efuse_addr;
- return true;
+ return _TRUE;
}
static u8
PPGPKT_STRUCT pTargetPkt,
u8 bPseudoTest)
{
- u8 bRet=false;
+ u8 bRet=_FALSE;
if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
{
badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
if (badworden != 0x0F)
{
- DBG_8192C("%s: Fail!!\n", __FUNCTION__);
- return false;
+ DBG_8723A("%s: Fail!!\n", __FUNCTION__);
+ return _FALSE;
}
-// DBG_8192C("%s: ok\n", __FUNCTION__);
- return true;
+// DBG_8723A("%s: ok\n", __FUNCTION__);
+ return _TRUE;
}
static s32
u8 efuseType=EFUSE_WIFI;
if (!hal_EfusePgCheckAvailableAddr(padapter, efuseType, bPseudoTest))
- return false;
+ return _FALSE;
hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
if (!hal_EfusePartialWriteCheck(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
+ return _FALSE;
if (!hal_EfusePgPacketWriteHeader(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
+ return _FALSE;
if (!hal_EfusePgPacketWriteData(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
+ return _FALSE;
- return true;
+ return _TRUE;
}
static bool
Hal_EfusePgPacketWrite_BT(
- PADAPTER pAdapter,
+ _adapter *pAdapter,
u8 offset,
u8 word_en,
u8 *pData,
u8 efuseType=EFUSE_BT;
if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
- return false;
+ return _FALSE;
hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
+ return _FALSE;
if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
+ return _FALSE;
if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
+ return _FALSE;
- return true;
+ return _TRUE;
}
static HAL_VERSION
else
pHalData->rf_type = RF_1T1R;
- MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type);
+ MSG_8723A("RF_Type is %x!!\n", pHalData->rf_type);
return ChipVersion;
}
rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);// ms
// Firmware will control REG_DRVERLYINT when power saving is enable,
// so don't set this register on STA mode.
- if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == false)
+ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _FALSE)
rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME); // 5ms
rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms
rtw_write32(padapter, REG_TCR, value32);
// NOTE: Fix test chip's bug (about contention windows's randomness)
- if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == true)
+ if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == _TRUE)
{
rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50);
rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50);
}
- _BeaconFunctionEnable(padapter, true, true);
+ _BeaconFunctionEnable(padapter, _TRUE, _TRUE);
ResumeTxBeacon(padapter);
SetBcnCtrlReg(padapter, DIS_BCNQ_SUB, 0);
#endif
if(bSet){
- DBG_8192C("Set STA_(%d) info\n",psta->mac_id);
+ DBG_8723A("Set STA_(%d) info\n",psta->mac_id);
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta);
}
else{
- DBG_8192C("Clean STA_(%d) info\n",psta->mac_id);
+ DBG_8723A("Clean STA_(%d) info\n",psta->mac_id);
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL);
}
}
void hal_notch_filter_8723a(_adapter *adapter, bool enable)
{
if (enable) {
- DBG_871X("Enable notch filter\n");
+ DBG_8723A("Enable notch filter\n");
rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
} else {
- DBG_871X("Disable notch filter\n");
+ DBG_8723A("Disable notch filter\n");
rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
}
}
+s32 c2h_id_filter_ccx_8723a(u8 id)
+{
+ s32 ret = _FALSE;
+ if (id == C2H_CCX_TX_RPT)
+ ret = _TRUE;
+
+ return ret;
+}
+
static s32 c2h_handler_8723a(_adapter *padapter, struct c2h_evt_hdr *c2h_evt)
{
s32 ret = _SUCCESS;
u8 i = 0;
if (c2h_evt == NULL) {
- DBG_8192C("%s c2h_evt is NULL\n",__FUNCTION__);
+ DBG_8723A("%s c2h_evt is NULL\n",__FUNCTION__);
ret = _FAIL;
goto exit;
}
case C2H_CCX_TX_RPT:
handle_txrpt_ccx_8723a(padapter, c2h_evt->payload);
break;
-
-#ifdef CONFIG_BT_COEXIST
-#ifdef CONFIG_PCI_HCI
- case C2H_BT_RSSI:
- BT_FwC2hBtRssi(padapter, c2h_evt->payload);
- break;
-#endif
-#endif
-
case C2H_EXT_RA_RPT:
-// C2HExtRaRptHandler(padapter, tmpBuf, C2hEvent.CmdLen);
break;
-
case C2H_HW_INFO_EXCH:
RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], C2H_HW_INFO_EXCH\n"));
for (i = 0; i < c2h_evt->plen; i++) {
#ifdef CONFIG_BT_COEXIST
case C2H_BT_INFO:
+ DBG_8723A("%s , Got C2H_BT_INFO \n",__FUNCTION__);
BT_FwC2hBtInfo(padapter, c2h_evt->payload, c2h_evt->plen);
break;
#endif
-#ifdef CONFIG_MP_INCLUDED
- case C2H_BT_MP_INFO:
- DBG_8192C("%s , Got C2H_BT_MP_INFO \n",__FUNCTION__);
- MPTBT_FwC2hBtMpCtrl(padapter, c2h_evt->payload, c2h_evt->plen);
- break;
-#endif
default:
ret = _FAIL;
break;
pHalFunc->cancel_thread= &rtl8723a_stop_thread;
#ifdef CONFIG_ANTENNA_DIVERSITY
- pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8192C;
- pHalFunc->AntDivCompareHandler = &AntDivCompare8192C;
+ pHalFunc->AntDivBeforeLinkHandler = &odm_AntDivBeforeLink8192C;
+ pHalFunc->AntDivCompareHandler = &odm_AntDivCompare8192C;
#endif
pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg;
#ifdef DBG_CONFIG_ERROR_DETECT
pHalFunc->sreset_init_value = &sreset_init_value;
pHalFunc->sreset_reset_value = &sreset_reset_value;
- pHalFunc->silentreset = &rtl8723a_silentreset_for_specific_platform;
+ pHalFunc->silentreset = &sreset_reset;
pHalFunc->sreset_xmit_status_check = &rtl8723a_sreset_xmit_status_check;
pHalFunc->sreset_linked_status_check = &rtl8723a_sreset_linked_status_check;
pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status;
+ pHalFunc->sreset_inprogress= &sreset_inprogress;
#endif
pHalFunc->GetHalODMVarHandler = &rtl8723a_GetHalODMVar;
pHalFunc->SetHalODMVarHandler = &rtl8723a_SetHalODMVar;
pHalFunc->hal_notch_filter = &hal_notch_filter_8723a;
pHalFunc->c2h_handler = c2h_handler_8723a;
+ pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8723a;
+
+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST)
+ pHalFunc->hal_init_checkbthang_workqueue = &rtl8723a_init_checkbthang_workqueue;
+ pHalFunc->hal_free_checkbthang_workqueue = &rtl8723a_free_checkbthang_workqueue;
+ pHalFunc->hal_cancel_checkbthang_workqueue = &rtl8723a_cancel_checkbthang_workqueue;
+ pHalFunc->hal_checke_bt_hang = &rtl8723a_hal_check_bt_hang;
+#endif
}
void rtl8723a_InitAntenna_Selection(PADAPTER padapter)
pdmpriv = &pHalData->dmpriv;
// init default value
- pHalData->fw_ractrl = false;
- pHalData->bIQKInitialized = false;
+ pHalData->fw_ractrl = _FALSE;
+ pHalData->bIQKInitialized = _FALSE;
if (!padapter->pwrctrlpriv.bkeepfwalive)
pHalData->LastHMEBoxNum = 0;
- pHalData->bIQKInitialized = false;
+ pHalData->bIQKInitialized = _FALSE;
// init dm default value
pdmpriv->TM_Trigger = 0;//for IQK
-// pdmpriv->binitialized = false;
+// pdmpriv->binitialized = _FALSE;
// pdmpriv->prv_traffic_idx = 3;
// pdmpriv->initialize = 0;
// 6: EEPROM used is 93C46, 4: boot from E-Fuse.
size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
- MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46");
+ MSG_8723A("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46");
return size;
}
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+#if defined(CONFIG_USB_HCI)
//-------------------------------------------------------------------------
//
// LLT R/W/Init function
}
#endif
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+#if defined(CONFIG_USB_HCI)
void _DisableGPIO(PADAPTER padapter)
{
/***************************************
value32 |= ((u4bTmp<<8) | 0x00FF0000);
rtw_write32(padapter, REG_GPIO_PIN_CTRL, value32);
- if (IS_HARDWARE_TYPE_8723AU(padapter) ||
- IS_HARDWARE_TYPE_8723AS(padapter))
- {
- //
- // <Roger_Notes> For RTL8723u multi-function configuration which was autoload from Efuse offset 0x0a and 0x0b,
- // WLAN HW GPIO[9], GPS HW GPIO[10] and BT HW GPIO[11].
- // Added by Roger, 2010.10.07.
- //
- //2. Disable GPIO[8] and GPIO[12]
- rtw_write16(padapter, REG_GPIO_IO_SEL_2, 0x0000); // Configure all pins as input mode.
- value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F;
- u4bTmp = value32 & 0x0000001F;
-// if( IS_MULTI_FUNC_CHIP(padapter) )
-// value32 |= ((u4bTmp<<8) | 0x00110000); // Set pin 8 and pin 12 to output mode.
-// else
- value32 |= ((u4bTmp<<8) | 0x001D0000); // Set pin 8, 10, 11 and pin 12 to output mode.
- rtw_write32(padapter, REG_GPIO_PIN_CTRL_2, value32);
- }
- else
- {
- //2. Disable GPIO[10:8]
- rtw_write8(padapter, REG_MAC_PINMUX_CFG, 0x00);
- value16 = rtw_read16(padapter, REG_GPIO_IO_SEL) & 0xFF0F;
- value8 = (u8) (value16&0x000F);
- value16 |= ((value8<<4) | 0x0780);
- rtw_write16(padapter, REG_GPIO_IO_SEL, value16);
- }
+ //
+ // <Roger_Notes> For RTL8723u multi-function configuration which was autoload from Efuse offset 0x0a and 0x0b,
+ // WLAN HW GPIO[9], GPS HW GPIO[10] and BT HW GPIO[11].
+ // Added by Roger, 2010.10.07.
+ //
+ //2. Disable GPIO[8] and GPIO[12]
+ rtw_write16(padapter, REG_GPIO_IO_SEL_2, 0x0000); // Configure all pins as input mode.
+ value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F;
+ u4bTmp = value32 & 0x0000001F;
+ value32 |= ((u4bTmp<<8) | 0x001D0000); // Set pin 8, 10, 11 and pin 12 to output mode.
+ rtw_write32(padapter, REG_GPIO_PIN_CTRL_2, value32);
//3. Disable LED0 & 1
- if(IS_HARDWARE_TYPE_8192DU(padapter))
- {
- rtw_write16(padapter, REG_LEDCFG0, 0x8888);
- }
- else
- {
- rtw_write16(padapter, REG_LEDCFG0, 0x8080);
- }
-// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n"));
+ rtw_write16(padapter, REG_LEDCFG0, 0x8080);
} //end of _DisableGPIO()
void _DisableRFAFEAndResetBB8192C(PADAPTER padapter)
void _DisableRFAFEAndResetBB(PADAPTER padapter)
{
- _DisableRFAFEAndResetBB8192C(padapter);
+ _DisableRFAFEAndResetBB8192C(padapter);
}
void _ResetDigitalProcedure1_92C(PADAPTER padapter, bool bWithoutHWSM)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
- if (IS_FW_81xxC(padapter) && (pHalData->FirmwareVersion <= 0x20))
- {
+ if (IS_FW_81xxC(padapter) && (pHalData->FirmwareVersion <= 0x20)) {
/*****************************
f. MCUFWDL 0x80[7:0]=0 // reset MCU ready status
g. SYS_FUNC_EN 0x02[10]= 0 // reset MCU register, (8051 reset)
// 2010/08/12 MH For USB SS, we can not stop 8051 when we are trying to
// enter IPS/HW&SW radio off. For S3/S4/S5/Disable, we can stop 8051 because
// we will init FW when power on again.
+ //if(!pDevice->RegUsbSS)
{ // If we want to SS mode, we can not reset 8051.
if(rtw_read8(padapter, REG_MCUFWDL) & BIT1)
{ //IF fw in RAM code, do reset
while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(padapter, REG_SYS_FUNC_EN)))
{
rtw_udelay_os(50);//us
+ // 2010/08/25 For test only We keep on reset 5051 to prevent fail.
+ //rtw_write8(padapter, REG_HMETFR+3, 0x20);//8051 reset by self
}
+// RT_ASSERT((retry_cnts < 100), ("8051 reset failed!\n"));
if (retry_cnts >= 100)
{
rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x50); //Reset MAC and Enable 8051
rtw_mdelay_os(10);
}
+// else
+// RT_TRACE(COMP_INIT, DBG_LOUD, ("=====> 8051 reset success (%d) .\n",retry_cnts));
}
}
+// else
+// {
+// RT_TRACE(COMP_INIT, DBG_LOUD, ("=====> 8051 in ROM.\n"));
+// }
rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x54); //Reset MAC and Enable 8051
rtw_write8(padapter, REG_MCUFWDL, 0);
}
}
- if(bWithoutHWSM) {
+ //if(pDevice->RegUsbSS)
+ //bWithoutHWSM = TRUE; // Sugest by Filen and Issau.
+
+ if(bWithoutHWSM)
+ {
+ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
/*****************************
Without HW auto state machine
g. SYS_CLKR 0x08[15:0] = 0x30A3 //disable MAC clock
i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK
j. SYS_ISO_CTRL 0x00[7:0] = 0xF9 // isolated digital to PON
******************************/
- rtw_write16(padapter, REG_SYS_CLKR, 0x70A3); //modify to 0x70A3 by Scott.
+ //rtw_write16(padapter, REG_SYS_CLKR, 0x30A3);
+ //if(!pDevice->RegUsbSS)
+ // 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug.
+ //if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+ //rtw_write16(padapter, REG_SYS_CLKR, (0x70A3|BIT6)); //modify to 0x70A3 by Scott.
+ //else
+ rtw_write16(padapter, REG_SYS_CLKR, 0x70A3); //modify to 0x70A3 by Scott.
rtw_write8(padapter, REG_AFE_PLL_CTRL, 0x80);
rtw_write16(padapter, REG_AFE_XTAL_CTRL, 0x880F);
- rtw_write8(padapter, REG_SYS_ISO_CTRL, 0xF9);
- } else {
+ //if(!pDevice->RegUsbSS)
+ rtw_write8(padapter, REG_SYS_ISO_CTRL, 0xF9);
+ }
+ else
+ {
// Disable all RF/BB power
rtw_write8(padapter, REG_RF_CTRL, 0x00);
}
+// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n"));
+
}
void _ResetDigitalProcedure1(PADAPTER padapter, bool bWithoutHWSM)
rtw_write8(padapter, REG_RSV_CTRL, 0x0e);
+#if 0
+ //tynli_test for suspend mode.
+ if(!bWithoutHWSM){
+ rtw_write8(padapter, 0xfe10, 0x19);
+ }
+#endif
+
+// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16));
}
// HW Auto state machine
_DisableRFAFEAndResetBB(padapter);
// ==== Reset digital sequence ======
- _ResetDigitalProcedure1(padapter, false);
+ _ResetDigitalProcedure1(padapter, _FALSE);
// ==== Pull GPIO PIN to balance level and LED control ======
_DisableGPIO(padapter);
// ==== Disable analog sequence ===
- _DisableAnalog(padapter, false);
+ _DisableAnalog(padapter, _FALSE);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n"));
s32 rtStatus = _SUCCESS;
- if (padapter->bSurpriseRemoved)
+ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n"));
+ if (padapter->bSurpriseRemoved) {
return rtStatus;
+ }
//==== RF Off Sequence ====
_DisableRFAFEAndResetBB(padapter);
// ==== Reset digital sequence ======
- _ResetDigitalProcedure1(padapter, true);
+ _ResetDigitalProcedure1(padapter, _TRUE);
// ==== Pull GPIO PIN to balance level and LED control ======
_DisableGPIO(padapter);
_ResetDigitalProcedure2(padapter);
// ==== Disable analog sequence ===
- _DisableAnalog(padapter, true);
+ _DisableAnalog(padapter, _TRUE);
//RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n"));
return rtStatus;
u32 i;
u16 value16;
- if(false == pEEPROM->bautoload_fail_flag)
+ if(_FALSE == pEEPROM->bautoload_fail_flag)
{ // autoload OK.
// if (IS_BOOT_FROM_EEPROM(padapter))
- if (true == pEEPROM->EepromOrEfuse)
+ if (_TRUE == pEEPROM->EepromOrEfuse)
{
// Read all Content from EEPROM or EFUSE.
for(i = 0; i < HWSET_MAX_SIZE; i += 2)
else
{
// Read EFUSE real map to shadow.
- EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
+ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE);
memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE);
}
}
else
{//autoload fail
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
-// pHalData->AutoloadFailFlag = true;
+// pHalData->AutoloadFailFlag = _TRUE;
//update to default value 0xFF
- if (false == pEEPROM->EepromOrEfuse)
- EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
+ if (_FALSE == pEEPROM->EepromOrEfuse)
+ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE);
memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE);
}
}
EEPROMId = le16_to_cpu(*((u16*)hwinfo));
if (EEPROMId != RTL_EEPROM_ID)
{
- DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
- pEEPROM->bautoload_fail_flag = true;
+ DBG_8723A("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
+ pEEPROM->bautoload_fail_flag = _TRUE;
}
else
{
- pEEPROM->bautoload_fail_flag = false;
+ pEEPROM->bautoload_fail_flag = _FALSE;
}
RT_TRACE(_module_hal_init_c_, _drv_info_, ("EEPROM ID=0x%04x\n", EEPROMId));
#endif
if(!AutoLoadFail)
{
- pHalData->EEPROMRegulatory = PROMContent[RF_OPTION1_8723A]&0x7; //bit0~2
+ struct registry_priv *registry_par = &padapter->registrypriv;
+ if( registry_par->regulatory_tid == 0xff){
+ if( PROMContent[RF_OPTION1_8723A] == 0xff)
+ pHalData->EEPROMRegulatory = 0 ;
+ else
+ pHalData->EEPROMRegulatory = PROMContent[RF_OPTION1_8723A]&0x7; //bit0~2
+ }
+ else{
+ pHalData->EEPROMRegulatory = registry_par->regulatory_tid;
+ }
}
else
{
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory));
if(!AutoLoadFail)
- pHalData->bTXPowerDataReadFromEEPORM = true;
+ pHalData->bTXPowerDataReadFromEEPORM = _TRUE;
}
-void
+VOID
Hal_EfuseParseBTCoexistInfo_8723A(
IN PADAPTER padapter,
IN u8* hwinfo,
#endif
}
-void
+VOID
Hal_EfuseParseEEPROMVer(
IN PADAPTER padapter,
IN u8* hwinfo,
pHalData->EEPROMVersion));
}
-void
+VOID
rtl8723a_EfuseParseChnlPlan(
IN PADAPTER padapter,
IN u8* hwinfo,
, AutoLoadFail
);
- DBG_871X("mlmepriv.ChannelPlan=0x%02x\n", padapter->mlmepriv.ChannelPlan);
+ DBG_8723A("mlmepriv.ChannelPlan=0x%02x\n", padapter->mlmepriv.ChannelPlan);
}
-void
+VOID
Hal_EfuseParseCustomerID(
IN PADAPTER padapter,
IN u8* hwinfo,
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID));
}
-void
+VOID
Hal_EfuseParseAntennaDiversity(
IN PADAPTER padapter,
IN u8* hwinfo,
IN bool AutoLoadFail
)
{
+#ifdef CONFIG_ANTENNA_DIVERSITY
+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+ struct registry_priv *registry_par = &padapter->registrypriv;
+
+
+ if(!AutoLoadFail)
+ {
+ // Antenna Diversity setting.
+ if(registry_par->antdiv_cfg == 2) // 2: From Efuse
+ pHalData->AntDivCfg = (hwinfo[RF_OPTION1_8723A]&0x18)>>3;
+ else
+ pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON,
+
+ if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1)
+ pHalData->AntDivCfg = 0;
+
+ DBG_8723A("### AntDivCfg(%x) EEPROMBluetoothCoexist(%x) EEPROMBluetoothAntNum(%x)\n"
+ ,pHalData->AntDivCfg,pHalData->EEPROMBluetoothCoexist,pHalData->EEPROMBluetoothAntNum);
+ }
+ else
+ {
+ pHalData->AntDivCfg = 0;
+ }
+
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("SWAS: bHwAntDiv = %x\n", pHalData->AntDivCfg));
+#endif
}
-void
+VOID
Hal_EfuseParseRateIndicationOption(
IN PADAPTER padapter,
IN u8* hwinfo,
IN bool AutoLoadFail
)
{
+#if 0
+ PMGNT_INFO pMgntInfo = &(padapter->MgntInfo);
+
+ // Rate indication option
+ if(pMgntInfo->ShowRateMode == 0)
+ {
+ if(!AutoLoadFail)
+ {
+ switch((hwinfo[RF_OPTION3_8723A] & 0x0c) >> 2)
+ {
+ case 1: // Rx rate
+ pMgntInfo->bForcedShowRxRate = TRUE;
+ break;
+
+ case 2: // Max Rx rate
+ pMgntInfo->bForcedShowRateStill = TRUE;
+ pMgntInfo->bForcedShowRxRate = TRUE;
+ break;
+
+ default:
+ break;
+ }
+ }
+ else
+ {
+ pMgntInfo->bForcedShowRxRate = TRUE;
+ }
+ }
+ else if(pMgntInfo->ShowRateMode == 2)
+ {
+ pMgntInfo->bForcedShowRxRate = TRUE;
+ }
+ else if(pMgntInfo->ShowRateMode == 3)
+ {
+ pMgntInfo->bForcedShowRxRate = TRUE;
+ pMgntInfo->bForcedShowRxRate = TRUE;
+ }
+#endif
}
void
u8 AutoLoadFail
)
{
+#if 1
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
if (!AutoLoadFail){
pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723A;
}
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: CrystalCap=0x%2x\n", __FUNCTION__, pHalData->CrystalCap));
+#endif
}
void
//
// ThermalMeter from EEPROM
//
- if (false == AutoloadFail)
+ if (_FALSE == AutoloadFail)
pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_8723A];
else
pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
- if ((pHalData->EEPROMThermalMeter == 0xff) || (true == AutoloadFail))
+ if ((pHalData->EEPROMThermalMeter == 0xff) || (_TRUE == AutoloadFail))
{
- pHalData->bAPKThermalMeterIgnore = true;
+ pHalData->bAPKThermalMeterIgnore = _TRUE;
pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
}
- DBG_8192C("%s: ThermalMeter=0x%x\n", __FUNCTION__, pHalData->EEPROMThermalMeter);
+ DBG_8723A("%s: ThermalMeter=0x%x\n", __FUNCTION__, pHalData->EEPROMThermalMeter);
}
-void Hal_InitChannelPlan(IN PADAPTER padapter)
+VOID
+Hal_InitChannelPlan(
+ IN PADAPTER padapter
+ )
{
+#if 0
+ PMGNT_INFO pMgntInfo = &(padapter->MgntInfo);
+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+
+ if((pMgntInfo->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
+ {
+ pMgntInfo->ChannelPlan = hal_MapChannelPlan8192C(padapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
+ pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? _TRUE : _FALSE; // User cannot change channel plan.
+ }
+ else
+ {
+ pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
+ }
+
+ switch(pMgntInfo->ChannelPlan)
+ {
+ case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
+ {
+ PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
+
+ pDot11dInfo->bEnabled = TRUE;
+ }
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
+ break;
+
+ default: //for MacOSX compiler warning.
+ break;
+ }
+
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
+#endif
}
void rtl8723a_cal_txdesc_chksum(struct tx_desc *ptxdesc)
static void fill_txdesc_vcs(struct pkt_attrib *pattrib, PTXDESC ptxdesc)
{
- //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
+ //DBG_8723A("cvs_mode=%d\n", pattrib->vcs_mode);
switch (pattrib->vcs_mode)
{
static void fill_txdesc_phy(struct pkt_attrib *pattrib, PTXDESC ptxdesc)
{
- //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
+ //DBG_8723A("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
if (pattrib->ht_en)
{
{
ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID)
- if (pattrib->ampdu_en == true)
+ if (pattrib->ampdu_en == _TRUE)
ptxdesc->agg_en = 1; // AGG EN
else
ptxdesc->bk = 1; // AGG BK
// use REG_INIDATA_RATE_SEL value
ptxdesc->datarate = pdmpriv->INIDATA_RATE[pattrib->mac_id];
- } else {
+#if 0
+ ptxdesc->userate = 1; // driver uses rate
+
+ if (pattrib->ht_en)
+ ptxdesc->sgi = 1; // SGI
+
+ ptxdesc->datarate = 0x13; // init rate - mcs7
+#endif
+ }
+ else
+ {
// EAP data packet and ARP packet.
// Use the 1M data rate to send the EAP/ARP packet.
// This will maybe make the handshake smooth.
ptxdesc->data_short = 1;// DATA_SHORT
ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate);
}
-#if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+#if defined(CONFIG_USB_TX_AGGREGATION)
ptxdesc->usb_txagg_num = pxmitframe->agg_num;
#endif
- } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
+ }
+ else if (pxmitframe->frame_tag == MGNT_FRAMETAG)
+ {
+// RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MGNT_FRAMETAG\n", __FUNCTION__));
+
ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID)
ptxdesc->qsel = pattrib->qsel;
ptxdesc->rate_id = pattrib->raid; // Rate ID
#ifdef CONFIG_XMIT_ACK
//CCX-TXRPT ack for xmit mgmt frames.
if (pxmitframe->ack_report) {
+ #ifdef DBG_CCX
+ static u16 ccx_sw = 0x123;
+ txdesc_set_ccx_sw_8723a(ptxdesc, ccx_sw);
+ DBG_8723A("%s set ccx, sw:0x%03x\n", __func__, ccx_sw);
+ ccx_sw = (ccx_sw+1)%0xfff;
+ #endif
ptxdesc->ccx = 1;
}
#endif //CONFIG_XMIT_ACK
#ifdef CONFIG_INTEL_PROXIM
- if((padapter->proximity.proxim_on==true)&&(pattrib->intel_proxim==true)){
- DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate);
+ if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){
+ DBG_8723A("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate);
ptxdesc->datarate = pattrib->rate;
}
else
{
RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: TXAGG_FRAMETAG\n", __FUNCTION__));
}
-#ifdef CONFIG_MP_INCLUDED
- else if (pxmitframe->frame_tag == MP_FRAMETAG)
- {
- struct tx_desc *pdesc;
-
- pdesc = (struct tx_desc*)ptxdesc;
- RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MP_FRAMETAG\n", __FUNCTION__));
- fill_txdesc_for_mp(padapter, pdesc);
-
- pdesc->txdw0 = le32_to_cpu(pdesc->txdw0);
- pdesc->txdw1 = le32_to_cpu(pdesc->txdw1);
- pdesc->txdw2 = le32_to_cpu(pdesc->txdw2);
- pdesc->txdw3 = le32_to_cpu(pdesc->txdw3);
- pdesc->txdw4 = le32_to_cpu(pdesc->txdw4);
- pdesc->txdw5 = le32_to_cpu(pdesc->txdw5);
- pdesc->txdw6 = le32_to_cpu(pdesc->txdw6);
- pdesc->txdw7 = le32_to_cpu(pdesc->txdw7);
-#ifdef CONFIG_PCI_HCI
- pdesc->txdw8 = le32_to_cpu(pdesc->txdw8);
- pdesc->txdw9 = le32_to_cpu(pdesc->txdw9);
- pdesc->txdw10 = le32_to_cpu(pdesc->txdw10);
- pdesc->txdw11 = le32_to_cpu(pdesc->txdw11);
- pdesc->txdw12 = le32_to_cpu(pdesc->txdw12);
- pdesc->txdw13 = le32_to_cpu(pdesc->txdw13);
- pdesc->txdw14 = le32_to_cpu(pdesc->txdw14);
- pdesc->txdw15 = le32_to_cpu(pdesc->txdw15);
-#endif
- }
-#endif
else
{
RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag));
pdesc->txdw5 = cpu_to_le32(pdesc->txdw5);
pdesc->txdw6 = cpu_to_le32(pdesc->txdw6);
pdesc->txdw7 = cpu_to_le32(pdesc->txdw7);
-#ifdef CONFIG_PCI_HCI
- pdesc->txdw8 = cpu_to_le32(pdesc->txdw8);
- pdesc->txdw9 = cpu_to_le32(pdesc->txdw9);
- pdesc->txdw10 = cpu_to_le32(pdesc->txdw10);
- pdesc->txdw11 = cpu_to_le32(pdesc->txdw11);
- pdesc->txdw12 = cpu_to_le32(pdesc->txdw12);
- pdesc->txdw13 = cpu_to_le32(pdesc->txdw13);
- pdesc->txdw14 = cpu_to_le32(pdesc->txdw14);
- pdesc->txdw15 = cpu_to_le32(pdesc->txdw15);
-#endif
-
rtl8723a_cal_txdesc_chksum(pdesc);
}
ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
}
- if (true == IsBTQosNull)
+ if (_TRUE == IsBTQosNull)
{
ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL
}
//offset 16
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
+#if defined(CONFIG_USB_HCI)
// USB interface drop packet if the checksum of descriptor isn't correct.
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
rtl8723a_cal_txdesc_chksum(ptxdesc);
reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt);
}
- return(loop_cnt >= 10) ? _FAIL : true;
+ return(loop_cnt >= 10) ? _FAIL : _TRUE;
}
#endif
#ifdef CONFIG_TSF_RESET_OFFLOAD
// Reset TSF for STA+AP concurrent mode
if ( check_buddy_fwstate(padapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) {
- if (reset_tsf(padapter, padapter->iface_type) == false)
- DBG_871X("ERROR! %s()-%d: Reset port%d TSF fail\n",
+ if (reset_tsf(padapter, padapter->iface_type) == _FALSE)
+ DBG_8723A("ERROR! %s()-%d: Reset port%d TSF fail\n",
__FUNCTION__, __LINE__,
(padapter->iface_type==IFACE_PORT1)? 1 : 0);
}
if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE
&& check_buddy_fwstate(padapter, WIFI_AP_STATE) ) {
if (padapter->iface_type == IFACE_PORT1) {
- if (reset_tsf(padapter, IFACE_PORT0) == false)
- DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n",
+ if (reset_tsf(padapter, IFACE_PORT0) == _FALSE)
+ DBG_8723A("ERROR! %s()-%d: Reset port0 TSF fail\n",
__FUNCTION__, __LINE__);
} else {
- if (reset_tsf(padapter, IFACE_PORT1) == false)
- DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n",
+ if (reset_tsf(padapter, IFACE_PORT1) == _FALSE)
+ DBG_8723A("ERROR! %s()-%d: Reset port1 TSF fail\n",
__FUNCTION__, __LINE__);
}
}
SetBcnCtrlReg(padapter, DIS_TSF_UDT, 0);
if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
- (check_buddy_fwstate(padapter, _FW_LINKED) == true))
+ (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE))
{
StopTxBeacon(padapter);
}
rtw_write32(padapter, REG_RCR, v32);
if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
- (check_buddy_fwstate(padapter, _FW_LINKED) == true))
+ (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE))
+ {
ResumeTxBeacon(padapter);
+#if 0
+ // reset TSF 1/2 after ResumeTxBeacon
+ if (pbuddy_adapter->iface_type == IFACE_PORT1)
+ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1));
+ else
+ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(0));
+#endif
+
+ }
}
}
#endif
#ifdef CONFIG_CONCURRENT_MODE
if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
- (check_buddy_fwstate(padapter, _FW_LINKED) == true))
+ (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE))
{
StopTxBeacon(padapter);
}
}
rtw_write32(padapter, REG_RCR, v32);
- if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true)
+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48;
else // Ad-hoc Mode
RetryLimit = 0x7;
rtw_write16(padapter, REG_RXFLTMAP2, 0);
if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
- (check_buddy_fwstate(padapter, _FW_LINKED) == true))
+ (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE))
{
ResumeTxBeacon(padapter);
// enable update TSF
SetBcnCtrlReg(padapter, 0, DIS_TSF_UDT);
- if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == true)
+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
{
// fixed beacon issue for 8191su...........
rtw_write8(padapter, 0x542, 0x02);
#ifdef CONFIG_CONCURRENT_MODE
if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
- (check_buddy_fwstate(padapter, _FW_LINKED) == true))
+ (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE))
{
ResumeTxBeacon(padapter);
_func_enter_;
- switch (variable) {
- case HW_VAR_MEDIA_STATUS:
- {
- u8 val8;
+ switch (variable)
+ {
+ case HW_VAR_MEDIA_STATUS:
+ {
+ u8 val8;
- val8 = rtw_read8(padapter, MSR) & 0x0c;
- val8 |= *val;
- rtw_write8(padapter, MSR, val8);
- }
- break;
- case HW_VAR_MEDIA_STATUS1:
- {
- u8 val8;
+ val8 = rtw_read8(padapter, MSR) & 0x0c;
+ val8 |= *val;
+ rtw_write8(padapter, MSR, val8);
+ }
+ break;
+
+ case HW_VAR_MEDIA_STATUS1:
+ {
+ u8 val8;
+
+ val8 = rtw_read8(padapter, MSR) & 0x03;
+ val8 |= *val << 2;
+ rtw_write8(padapter, MSR, val8);
+ }
+ break;
+
+ case HW_VAR_SET_OPMODE:
+ hw_var_set_opmode(padapter, variable, val);
+ break;
+
+ case HW_VAR_MAC_ADDR:
+ hw_var_set_macaddr(padapter, variable, val);
+ break;
+
+ case HW_VAR_BSSID:
+ hw_var_set_bssid(padapter, variable, val);
+ break;
+
+ case HW_VAR_BASIC_RATE:
+ {
+ u16 BrateCfg = 0;
+ u8 RateIndex = 0;
- val8 = rtw_read8(padapter, MSR) & 0x03;
- val8 |= *val << 2;
- rtw_write8(padapter, MSR, val8);
- }
- break;
- case HW_VAR_SET_OPMODE:
- hw_var_set_opmode(padapter, variable, val);
- break;
- case HW_VAR_MAC_ADDR:
- hw_var_set_macaddr(padapter, variable, val);
- break;
- case HW_VAR_BSSID:
- hw_var_set_bssid(padapter, variable, val);
- break;
- case HW_VAR_BASIC_RATE:
- {
- u16 BrateCfg = 0;
- u8 RateIndex = 0;
// 2007.01.16, by Emily
- // Select RRSR (in Legacy-OFDM and CCK)
- // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
- // We do not use other rates.
- HalSetBrateCfg(padapter, val, &BrateCfg);
+ // Select RRSR (in Legacy-OFDM and CCK)
+ // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
+ // We do not use other rates.
+ HalSetBrateCfg(padapter, val, &BrateCfg);
+
//2011.03.30 add by Luke Lee
- //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT
- //because CCK 2M has poor TXEVM
- //CCK 5.5M & 11M ACK should be enabled for better performance
+ //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT
+ //because CCK 2M has poor TXEVM
+ //CCK 5.5M & 11M ACK should be enabled for better performance
+
pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d;
- BrateCfg |= 0x01; // default enable 1M ACK rate
- DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
+ BrateCfg |= 0x01; // default enable 1M ACK rate
+ DBG_8723A("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
+
// Set RRSR rate table.
- rtw_write8(padapter, REG_RRSR, BrateCfg&0xff);
- rtw_write8(padapter, REG_RRSR+1, (BrateCfg>>8)&0xff);
- rtw_write8(padapter, REG_RRSR+2, rtw_read8(padapter, REG_RRSR+2)&0xf0);
+ rtw_write8(padapter, REG_RRSR, BrateCfg&0xff);
+ rtw_write8(padapter, REG_RRSR+1, (BrateCfg>>8)&0xff);
+ rtw_write8(padapter, REG_RRSR+2, rtw_read8(padapter, REG_RRSR+2)&0xf0);
+
// Set RTS initial rate
- while (BrateCfg > 0x1)
- {
- BrateCfg = (BrateCfg >> 1);
- RateIndex++;
+ while (BrateCfg > 0x1)
+ {
+ BrateCfg = (BrateCfg >> 1);
+ RateIndex++;
+ }
+ // Ziv - Check
+ rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
}
- // Ziv - Check
- rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
- }
- break;
- case HW_VAR_TXPAUSE:
- rtw_write8(padapter, REG_TXPAUSE, *val);
- break;
- case HW_VAR_BCN_FUNC:
- if (*val)
- SetBcnCtrlReg(padapter, EN_BCN_FUNCTION | EN_TXBCN_RPT, 0);
- else
- SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION | EN_TXBCN_RPT);
- break;
- case HW_VAR_CORRECT_TSF:
- hw_var_set_correct_tsf(padapter, variable, val);
- break;
- case HW_VAR_CHECK_BSSID:
- {
- u32 val32;
- val32 = rtw_read32(padapter, REG_RCR);
+ break;
+
+ case HW_VAR_TXPAUSE:
+ rtw_write8(padapter, REG_TXPAUSE, *val);
+ break;
+
+ case HW_VAR_BCN_FUNC:
if (*val)
- val32 |= RCR_CBSSID_DATA|RCR_CBSSID_BCN;
+ SetBcnCtrlReg(padapter, EN_BCN_FUNCTION | EN_TXBCN_RPT, 0);
else
- val32 &= ~(RCR_CBSSID_DATA|RCR_CBSSID_BCN);
- rtw_write32(padapter, REG_RCR, val32);
- }
- break;
- case HW_VAR_MLME_DISCONNECT:
- hw_var_set_mlme_disconnect(padapter, variable, val);
- break;
- case HW_VAR_MLME_SITESURVEY:
-#ifdef CONFIG_CONCURRENT_MODE
- hw_var_set_mlme_sitesurvey(padapter, variable, val);
-#else
- if (*val)//under sitesurvey
- {
- u32 v32;
+ SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION | EN_TXBCN_RPT);
+ break;
- // config RCR to receive different BSSID & not to receive data frame
- v32 = rtw_read32(padapter, REG_RCR);
- v32 &= ~(RCR_CBSSID_BCN);
- rtw_write32(padapter, REG_RCR, v32);
- // reject all data frame
- rtw_write16(padapter, REG_RXFLTMAP2, 0);
+ case HW_VAR_CORRECT_TSF:
+ hw_var_set_correct_tsf(padapter, variable, val);
+ break;
- // disable update TSF
- SetBcnCtrlReg(padapter, DIS_TSF_UDT, 0);
- }
- else//sitesurvey done
- {
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
- u32 v32;
+ case HW_VAR_CHECK_BSSID:
+ {
+ u32 val32;
+ val32 = rtw_read32(padapter, REG_RCR);
+ if (*val)
+ val32 |= RCR_CBSSID_DATA|RCR_CBSSID_BCN;
+ else
+ val32 &= ~(RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+ rtw_write32(padapter, REG_RCR, val32);
+ }
+ break;
+
+ case HW_VAR_MLME_DISCONNECT:
+ hw_var_set_mlme_disconnect(padapter, variable, val);
+ break;
- if ((is_client_associated_to_ap(padapter) == true) ||
- ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ||
- ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+ case HW_VAR_MLME_SITESURVEY:
+#ifdef CONFIG_CONCURRENT_MODE
+ hw_var_set_mlme_sitesurvey(padapter, variable, val);
+#else
+ if (*val)//under sitesurvey
{
- // enable to rx data frame
- rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
+ u32 v32;
- // enable update TSF
- SetBcnCtrlReg(padapter, 0, DIS_TSF_UDT);
+ // config RCR to receive different BSSID & not to receive data frame
+ v32 = rtw_read32(padapter, REG_RCR);
+ v32 &= ~(RCR_CBSSID_BCN);
+ rtw_write32(padapter, REG_RCR, v32);
+ // reject all data frame
+ rtw_write16(padapter, REG_RXFLTMAP2, 0);
+
+ // disable update TSF
+ SetBcnCtrlReg(padapter, DIS_TSF_UDT, 0);
}
+ else//sitesurvey done
+ {
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+ u32 v32;
- v32 = rtw_read32(padapter, REG_RCR);
- v32 |= RCR_CBSSID_BCN;
- rtw_write32(padapter, REG_RCR, v32);
- }
+ if ((is_client_associated_to_ap(padapter) == _TRUE) ||
+ ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ||
+ ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+ {
+ // enable to rx data frame
+#if 0
+ v32 = rtw_read32(padapter, REG_RCR);
+ v32 |= RCR_ADF;
+ rtw_write32(padapter, REG_RCR, v32);
+#else
+ rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
+#endif
+
+ // enable update TSF
+ SetBcnCtrlReg(padapter, 0, DIS_TSF_UDT);
+ }
+
+ v32 = rtw_read32(padapter, REG_RCR);
+ v32 |= RCR_CBSSID_BCN;
+ rtw_write32(padapter, REG_RCR, v32);
+ }
#endif
#ifdef CONFIG_BT_COEXIST
- BT_WifiScanNotify(padapter, *val?true:false);
+ BT_WifiScanNotify(padapter, *val?_TRUE:_FALSE);
#endif
break;
hw_var_set_mlme_join(padapter, variable, val);
#ifdef CONFIG_BT_COEXIST
- switch (*val) {
+ switch (*val)
+ {
case 0:
// prepare to join
- BT_WifiAssociateNotify(padapter, true);
+ BT_WifiAssociateNotify(padapter, _TRUE);
break;
case 1:
// joinbss_event callback when join res < 0
- BT_WifiAssociateNotify(padapter, false);
+ BT_WifiAssociateNotify(padapter, _FALSE);
break;
case 2:
// sta add event callback
#endif
break;
+ case HW_VAR_ON_RCR_AM:
+ rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_AM);
+ DBG_8723A("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(padapter, REG_RCR));
+ break;
+
+ case HW_VAR_OFF_RCR_AM:
+ rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)& (~RCR_AM));
+ DBG_8723A("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(padapter, REG_RCR));
+ break;
+
case HW_VAR_BEACON_INTERVAL:
rtw_write16(padapter, REG_BCN_INTERVAL, *((u16*)val));
break;
break;
case HW_VAR_RESP_SIFS:
+#if 0
+ // SIFS for OFDM Data ACK
+ rtw_write8(padapter, REG_SIFS_CTX+1, val[0]);
+ // SIFS for OFDM consecutive tx like CTS data!
+ rtw_write8(padapter, REG_SIFS_TRX+1, val[1]);
+
+ rtw_write8(padapter, REG_SPEC_SIFS+1, val[0]);
+ rtw_write8(padapter, REG_MAC_SPEC_SIFS+1, val[0]);
+
+ // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change.
+ rtw_write8(padapter, REG_R2T_SIFS+1, val[0]);
+ rtw_write8(padapter, REG_T2T_SIFS+1, val[0]);
+
+#else
//SIFS_Timer = 0x0a0a0808;
//RESP_SIFS for CCK
rtw_write8(padapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08)
//RESP_SIFS for OFDM
rtw_write8(padapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a)
rtw_write8(padapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a)
+#endif
break;
case HW_VAR_ACK_PREAMBLE:
hwctrl |= AcmHw_VoqEn;
}
- DBG_8192C("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl);
+ DBG_8723A("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl);
rtw_write8(padapter, REG_ACMHWCTRL, hwctrl);
}
break;
pRegToSet = RegToSet_Normal; // 0xb972a841;
#ifdef CONFIG_BT_COEXIST
- if ((BT_IsBtDisabled(padapter) == false) &&
- (BT_1Ant(padapter) == true))
+ if ((BT_IsBtDisabled(padapter) == _FALSE) &&
+ (BT_1Ant(padapter) == _TRUE))
{
MaxAggNum = 0x8;
}
// saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang.
if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID)))
{
- ODM_RF_Saving(&pHalData->odmpriv, true);
+ ODM_RF_Saving(&pHalData->odmpriv, _TRUE);
}
rtl8723a_set_FwPwrMode_cmd(padapter, psmode);
}
rtl8723a_set_FwJoinBssReport_cmd(padapter, *val);
break;
-#ifdef CONFIG_P2P
+#ifdef CONFIG_P2P_PS
case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
rtl8192c_set_p2p_ps_offload_cmd(padapter, *val);
break;
-#endif //CONFIG_P2P
+#endif //CONFIG_P2P_PS
case HW_VAR_INITIAL_GAIN:
{
{
u8 Optimum_antenna = *val;
- //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B");
+ //DBG_8723A("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B");
//PHY_SetBBReg(padapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna);
ODM_SetAntenna(&pHalData->odmpriv, Optimum_antenna);
// keep sn
padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ);
- if (pwrpriv->bkeepfwalive != true)
+ if (pwrpriv->bkeepfwalive != _TRUE)
{
u32 v32;
if (!v32) break;
} while (trycnt--);
if (trycnt == 0) {
- DBG_8192C("Stop RX DMA failed......\n");
+ DBG_8723A("Stop RX DMA failed......\n");
}
// RQPN Load 0
{
if (rtw_read32(padapter, 0x200) != rtw_read32(padapter, 0x204))
{
- //DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(padapter, 0x204), rtw_read32(padapter, 0x200), i);
+ //DBG_8723A("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(padapter, 0x204), rtw_read32(padapter, 0x200), i);
rtw_msleep_os(10);
}
else
{
- DBG_871X("no packet in tx packet buffer (%d)\n", i);
+ DBG_8723A("no packet in tx packet buffer (%d)\n", i);
break;
}
}
case HW_VAR_APFM_ON_MAC:
pHalData->bMacPwrCtrlOn = *val;
- DBG_8192C("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn);
+ DBG_8723A("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn);
break;
+
case HW_VAR_NAV_UPPER:
{
u32 usNavUpper = *((u32*)val);
rtw_write8(padapter, REG_NAV_UPPER, (u8)usNavUpper);
}
break;
+
case HW_VAR_BCN_VALID:
//BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw
rtw_write8(padapter, REG_TDECTRL+2, rtw_read8(padapter, REG_TDECTRL+2) | BIT0);
break;
+
default:
break;
}
case HW_VAR_BCN_VALID:
//BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2
- val[0] = (BIT0 & rtw_read8(padapter, REG_TDECTRL+2))?true:false;
+ val[0] = (BIT0 & rtw_read8(padapter, REG_TDECTRL+2))?_TRUE:_FALSE;
break;
case HW_VAR_RF_TYPE:
// When we halt NIC, we should check if FW LPS is leave.
u32 valRCR;
- if ((padapter->bSurpriseRemoved == true) ||
+ if ((padapter->bSurpriseRemoved == _TRUE) ||
(padapter->pwrctrlpriv.rf_pwrstate == rf_off))
{
// If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave,
// because Fw is unload.
- *val = true;
+ *val = _TRUE;
}
else
{
valRCR = rtw_read32(padapter, REG_RCR);
valRCR &= 0x00070000;
if(valRCR)
- *val = false;
+ *val = _FALSE;
else
- *val = true;
+ *val = _TRUE;
}
}
break;
*val = pHalData->bMacPwrCtrlOn;
break;
case HW_VAR_CHK_HI_QUEUE_EMPTY:
- *val = ((rtw_read32(padapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? true:false;
+ *val = ((rtw_read32(padapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? _TRUE:_FALSE;
break;
}
}
// We should take power tracking, IQK, LCK, RCK RF read/write operation into consideration.
// 2011.12.15.
//
- if (IS_HARDWARE_TYPE_8723A(padapter) && !pHalData->bAntennaDetected)
- {
+ if (!pHalData->bAntennaDetected) {
u8 btAntNum = BT_GetPGAntNum(padapter);
// Set default antenna B status
if (btAntNum == Ant_x2)
- pDM_SWAT_Table->ANTB_ON = true;
+ pDM_SWAT_Table->ANTB_ON = _TRUE;
else if (btAntNum == Ant_x1)
- pDM_SWAT_Table->ANTB_ON = false;
+ pDM_SWAT_Table->ANTB_ON = _FALSE;
else
- pDM_SWAT_Table->ANTB_ON = true;
+ pDM_SWAT_Table->ANTB_ON = _TRUE;
if (pHalData->CustomerID != RT_CID_TOSHIBA )
{
for (i=0; i<MAX_ANTENNA_DETECTION_CNT; i++)
{
- if (ODM_SingleDualAntennaDetection(&pHalData->odmpriv, ANTTESTALL) == true)
+ if (ODM_SingleDualAntennaDetection(&pHalData->odmpriv, ANTTESTALL) == _TRUE)
break;
}
if (btAntNum == Ant_x2)
BT_SetBtCoexCurrAntNum(padapter, pDM_SWAT_Table->ANTB_ON ? 2 : 1);
}
- pHalData->bAntennaDetected = true;
+ pHalData->bAntennaDetected = _TRUE;
}
}
#endif // CONFIG_BT_COEXIST
void rtl8723a_clone_haldata(_adapter* dst_adapter, _adapter* src_adapter)
{
-#ifdef CONFIG_SDIO_HCI
- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(dst_adapter);
- _sema temp_SdioXmitSema;
- _sema temp_SdioXmitTerminateSema;
- _lock temp_SdioTxFIFOFreePageLock;
-
- memcpy(&temp_SdioXmitSema, &(pHalData->SdioXmitSema), sizeof(_sema));
- memcpy(&temp_SdioXmitTerminateSema, &(pHalData->SdioXmitTerminateSema), sizeof(_sema));
- memcpy(&temp_SdioTxFIFOFreePageLock, &(pHalData->SdioTxFIFOFreePageLock), sizeof(_lock));
-
- memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
-
- memcpy(&(pHalData->SdioXmitSema), &temp_SdioXmitSema, sizeof(_sema));
- memcpy(&(pHalData->SdioXmitTerminateSema), &temp_SdioXmitTerminateSema, sizeof(_sema));
- memcpy(&(pHalData->SdioTxFIFOFreePageLock), &temp_SdioTxFIFOFreePageLock, sizeof(_lock));
-
-#else
memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
-#endif
-
}
void rtl8723a_start_thread(_adapter *padapter)
{
-#if (defined CONFIG_SDIO_HCI) || (defined CONFIG_GSPI_HCI)
-#ifndef CONFIG_SDIO_TX_TASKLET
- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
-
- pHalData->SdioXmitThread = kthread_run(rtl8723as_xmit_thread, padapter, "RTWHALXT");
- if (IS_ERR(pHalData->SdioXmitThread))
- {
- RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8723as_xmit_thread FAIL!!\n", __FUNCTION__));
- }
-#endif
-#endif
}
void rtl8723a_stop_thread(_adapter *padapter)
{
-#if (defined CONFIG_SDIO_HCI) || (defined CONFIG_GSPI_HCI)
-#ifndef CONFIG_SDIO_TX_TASKLET
- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
-
- // stop xmit_buf_thread
- if (pHalData->SdioXmitThread ) {
- _rtw_up_sema(&pHalData->SdioXmitSema);
- _rtw_down_sema(&pHalData->SdioXmitTerminateSema);
- pHalData->SdioXmitThread = 0;
- }
-#endif
-#endif
}
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