#include "hw/isa/vt82c686.h"
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
+#include "hw/ide/pci.h"
#include "hw/isa/isa.h"
#include "hw/isa/superio.h"
#include "hw/intc/i8259.h"
#include "hw/irq.h"
#include "hw/dma/i8257.h"
+#include "hw/usb/hcd-uhci.h"
#include "hw/timer/i8254.h"
#include "hw/rtc/mc146818rtc.h"
#include "migration/vmstate.h"
.device_id = PCI_DEVICE_ID_VIA_82C686B_PM,
};
+#define TYPE_VT82C686B_PM "vt82c686b-pm"
+
static const TypeInfo vt82c686b_pm_info = {
.name = TYPE_VT82C686B_PM,
.parent = TYPE_VIA_PM,
.device_id = PCI_DEVICE_ID_VIA_8231_PM,
};
+#define TYPE_VT8231_PM "vt8231-pm"
+
static const TypeInfo vt8231_pm_info = {
.name = TYPE_VT8231_PM,
.parent = TYPE_VIA_PM,
struct ViaISAState {
PCIDevice dev;
qemu_irq cpu_intr;
- ISABus *isa_bus;
- ViaSuperIOState *via_sio;
+ qemu_irq *isa_irqs_in;
+ uint16_t irq_state[ISA_NUM_IRQS];
+ ViaSuperIOState via_sio;
+ MC146818RtcState rtc;
+ PCIIDEState ide;
+ UHCIState uhci[2];
+ ViaPMState pm;
+ ViaAC97State ac97;
+ PCIDevice mc97;
};
static const VMStateDescription vmstate_via = {
}
};
+static void via_isa_init(Object *obj)
+{
+ ViaISAState *s = VIA_ISA(obj);
+
+ object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &s->ide, TYPE_VIA_IDE);
+ object_initialize_child(obj, "uhci1", &s->uhci[0], TYPE_VT82C686B_USB_UHCI);
+ object_initialize_child(obj, "uhci2", &s->uhci[1], TYPE_VT82C686B_USB_UHCI);
+ object_initialize_child(obj, "ac97", &s->ac97, TYPE_VIA_AC97);
+ object_initialize_child(obj, "mc97", &s->mc97, TYPE_VIA_MC97);
+}
+
static const TypeInfo via_isa_info = {
.name = TYPE_VIA_ISA,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(ViaISAState),
+ .instance_init = via_isa_init,
.abstract = true,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
},
};
+static int via_isa_get_pci_irq(const ViaISAState *s, int pin)
+{
+ switch (pin) {
+ case 0:
+ return s->dev.config[0x55] >> 4;
+ case 1:
+ return s->dev.config[0x56] & 0xf;
+ case 2:
+ return s->dev.config[0x56] >> 4;
+ case 3:
+ return s->dev.config[0x57] >> 4;
+ }
+ return 0;
+}
+
+void via_isa_set_irq(PCIDevice *d, int pin, int level)
+{
+ ViaISAState *s = VIA_ISA(pci_get_function_0(d));
+ uint8_t irq = d->config[PCI_INTERRUPT_LINE], max_irq = 15;
+ int f = PCI_FUNC(d->devfn);
+ uint16_t mask = BIT(f);
+
+ switch (f) {
+ case 0: /* PIRQ/PINT inputs */
+ irq = via_isa_get_pci_irq(s, pin);
+ f = 8 + pin; /* Use function 8-11 for PCI interrupt inputs */
+ break;
+ case 2: /* USB ports 0-1 */
+ case 3: /* USB ports 2-3 */
+ case 5: /* AC97 audio */
+ max_irq = 14;
+ break;
+ }
+
+ /* Keep track of the state of all sources */
+ if (level) {
+ s->irq_state[0] |= mask;
+ } else {
+ s->irq_state[0] &= ~mask;
+ }
+ if (irq == 0 || irq == 0xff) {
+ return; /* disabled */
+ }
+ if (unlikely(irq > max_irq || irq == 2)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing %d for %d",
+ irq, f);
+ return;
+ }
+ /* Record source state at mapped IRQ */
+ if (level) {
+ s->irq_state[irq] |= mask;
+ } else {
+ s->irq_state[irq] &= ~mask;
+ }
+ /* Make sure there are no stuck bits if mapping has changed */
+ s->irq_state[irq] &= s->irq_state[0];
+ /* ISA IRQ level is the OR of all sources routed to it */
+ qemu_set_irq(s->isa_irqs_in[irq], !!s->irq_state[irq]);
+}
+
+static void via_isa_pirq(void *opaque, int pin, int level)
+{
+ via_isa_set_irq(opaque, pin, level);
+}
+
static void via_isa_request_i8259_irq(void *opaque, int irq, int level)
{
ViaISAState *s = opaque;
{
ViaISAState *s = VIA_ISA(d);
DeviceState *dev = DEVICE(d);
+ PCIBus *pci_bus = pci_get_bus(d);
qemu_irq *isa_irq;
+ ISABus *isa_bus;
int i;
qdev_init_gpio_out(dev, &s->cpu_intr, 1);
+ qdev_init_gpio_in_named(dev, via_isa_pirq, "pirq", PCI_NUM_PINS);
isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1);
- s->isa_bus = isa_bus_new(dev, get_system_memory(), pci_address_space_io(d),
- &error_fatal);
- isa_bus_irqs(s->isa_bus, i8259_init(s->isa_bus, *isa_irq));
- i8254_pit_init(s->isa_bus, 0x40, 0, NULL);
- i8257_dma_init(s->isa_bus, 0);
- mc146818_rtc_init(s->isa_bus, 2000, NULL);
+ isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d),
+ errp);
+
+ if (!isa_bus) {
+ return;
+ }
+
+ s->isa_irqs_in = i8259_init(isa_bus, *isa_irq);
+ isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
+ i8254_pit_init(isa_bus, 0x40, 0, NULL);
+ i8257_dma_init(isa_bus, 0);
+
+ /* RTC */
+ qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000);
+ if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
+ return;
+ }
+ isa_connect_gpio_out(ISA_DEVICE(&s->rtc), 0, s->rtc.isairq);
for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) {
if (i < PCI_COMMAND || i >= PCI_REVISION_ID) {
d->wmask[i] = 0;
}
}
+
+ /* Super I/O */
+ if (!qdev_realize(DEVICE(&s->via_sio), BUS(isa_bus), errp)) {
+ return;
+ }
+
+ /* Function 1: IDE */
+ qdev_prop_set_int32(DEVICE(&s->ide), "addr", d->devfn + 1);
+ if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
+ return;
+ }
+ for (i = 0; i < 2; i++) {
+ qdev_connect_gpio_out_named(DEVICE(&s->ide), "isa-irq", i,
+ s->isa_irqs_in[14 + i]);
+ }
+
+ /* Functions 2-3: USB Ports */
+ for (i = 0; i < ARRAY_SIZE(s->uhci); i++) {
+ qdev_prop_set_int32(DEVICE(&s->uhci[i]), "addr", d->devfn + 2 + i);
+ if (!qdev_realize(DEVICE(&s->uhci[i]), BUS(pci_bus), errp)) {
+ return;
+ }
+ }
+
+ /* Function 4: Power Management */
+ qdev_prop_set_int32(DEVICE(&s->pm), "addr", d->devfn + 4);
+ if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
+ return;
+ }
+
+ /* Function 5: AC97 Audio */
+ qdev_prop_set_int32(DEVICE(&s->ac97), "addr", d->devfn + 5);
+ if (!qdev_realize(DEVICE(&s->ac97), BUS(pci_bus), errp)) {
+ return;
+ }
+
+ /* Function 6: MC97 Modem */
+ qdev_prop_set_int32(DEVICE(&s->mc97), "addr", d->devfn + 6);
+ if (!qdev_realize(DEVICE(&s->mc97), BUS(pci_bus), errp)) {
+ return;
+ }
}
/* TYPE_VT82C686B_ISA */
pci_default_write_config(d, addr, val, len);
if (addr == 0x85) {
/* BIT(1): enable or disable superio config io ports */
- via_superio_io_enable(s->via_sio, val & BIT(1));
+ via_superio_io_enable(&s->via_sio, val & BIT(1));
}
}
pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */
}
-static void vt82c686b_realize(PCIDevice *d, Error **errp)
+static void vt82c686b_init(Object *obj)
{
- ViaISAState *s = VIA_ISA(d);
+ ViaISAState *s = VIA_ISA(obj);
- via_isa_realize(d, errp);
- s->via_sio = VIA_SUPERIO(isa_create_simple(s->isa_bus,
- TYPE_VT82C686B_SUPERIO));
+ object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT82C686B_SUPERIO);
+ object_initialize_child(obj, "pm", &s->pm, TYPE_VT82C686B_PM);
}
static void vt82c686b_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->realize = vt82c686b_realize;
+ k->realize = via_isa_realize;
k->config_write = vt82c686b_write_config;
k->vendor_id = PCI_VENDOR_ID_VIA;
k->device_id = PCI_DEVICE_ID_VIA_82C686B_ISA;
.name = TYPE_VT82C686B_ISA,
.parent = TYPE_VIA_ISA,
.instance_size = sizeof(ViaISAState),
+ .instance_init = vt82c686b_init,
.class_init = vt82c686b_class_init,
};
pci_default_write_config(d, addr, val, len);
if (addr == 0x50) {
/* BIT(2): enable or disable superio config io ports */
- via_superio_io_enable(s->via_sio, val & BIT(2));
+ via_superio_io_enable(&s->via_sio, val & BIT(2));
}
}
PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL);
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM);
+ pci_conf[0x4c] = 0x04; /* IDE interrupt Routing */
pci_conf[0x58] = 0x40; /* Miscellaneous Control 0 */
pci_conf[0x67] = 0x08; /* Fast IR Config */
pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */
}
-static void vt8231_realize(PCIDevice *d, Error **errp)
+static void vt8231_init(Object *obj)
{
- ViaISAState *s = VIA_ISA(d);
+ ViaISAState *s = VIA_ISA(obj);
- via_isa_realize(d, errp);
- s->via_sio = VIA_SUPERIO(isa_create_simple(s->isa_bus,
- TYPE_VT8231_SUPERIO));
+ object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT8231_SUPERIO);
+ object_initialize_child(obj, "pm", &s->pm, TYPE_VT8231_PM);
}
static void vt8231_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->realize = vt8231_realize;
+ k->realize = via_isa_realize;
k->config_write = vt8231_write_config;
k->vendor_id = PCI_VENDOR_ID_VIA;
k->device_id = PCI_DEVICE_ID_VIA_8231_ISA;
.name = TYPE_VT8231_ISA,
.parent = TYPE_VIA_ISA,
.instance_size = sizeof(ViaISAState),
+ .instance_init = vt8231_init,
.class_init = vt8231_class_init,
};
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