/*
- * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Copyright 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#ifdef DRV_I915
#include <errno.h>
+#include <i915_drm.h>
+#include <intel_bufmgr.h>
#include <string.h>
-#include <stdio.h>
#include <sys/mman.h>
#include <xf86drm.h>
-#include <i915_drm.h>
#include "drv_priv.h"
#include "helpers.h"
#include "util.h"
+static const uint32_t tileable_formats[] = {
+ DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
+ DRM_FORMAT_XRGB8888, DRM_FORMAT_UYVY, DRM_FORMAT_YUYV
+};
+
+static const uint32_t linear_only_formats[] = {
+ DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_YVU420
+};
+
struct i915_device
{
int gen;
+ drm_intel_bufmgr *mgr;
+ uint32_t count;
};
+struct i915_bo
+{
+ drm_intel_bo *ibos[DRV_MAX_PLANES];
+};
static int get_gen(int device_id)
{
return 4;
}
-static int i915_init(struct driver *drv)
+static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
+{
+ uint32_t i;
+ struct combination *combo;
+
+ /*
+ * Older hardware can't scanout Y-tiled formats. Newer devices can, and
+ * report this functionality via format modifiers.
+ */
+ for (i = 0; i < drv->backend->combos.size; i++) {
+ combo = &drv->backend->combos.data[i];
+ if (combo->format == item->format) {
+ if ((combo->metadata.tiling == I915_TILING_Y &&
+ item->modifier == I915_FORMAT_MOD_Y_TILED) ||
+ (combo->metadata.tiling == I915_TILING_X &&
+ item->modifier == I915_FORMAT_MOD_X_TILED)) {
+ combo->metadata.modifier = item->modifier;
+ combo->usage |= item->usage;
+ } else if (combo->metadata.tiling != I915_TILING_Y) {
+ combo->usage |= item->usage;
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int i915_add_combinations(struct driver *drv)
{
- struct i915_device *i915_drv;
- drm_i915_getparam_t get_param;
- int device_id;
int ret;
+ uint32_t i, num_items;
+ struct kms_item *items;
+ struct format_metadata metadata;
+ uint64_t flags = BO_COMMON_USE_MASK;
+
+ metadata.tiling = I915_TILING_NONE;
+ metadata.priority = 1;
+ metadata.modifier = DRM_FORMAT_MOD_NONE;
+
+ ret = drv_add_combinations(drv, linear_only_formats,
+ ARRAY_SIZE(linear_only_formats), &metadata,
+ flags);
+ if (ret)
+ return ret;
- i915_drv = (struct i915_device*)malloc(sizeof(*i915_drv));
- if (!i915_drv)
- return -1;
+ ret = drv_add_combinations(drv, tileable_formats,
+ ARRAY_SIZE(tileable_formats), &metadata,
+ flags);
+ if (ret)
+ return ret;
- memset(&get_param, 0, sizeof(get_param));
- get_param.param = I915_PARAM_CHIPSET_ID;
- get_param.value = &device_id;
- ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
- if (ret) {
- fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
- free(i915_drv);
- return -1;
- }
+ drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata,
+ BO_USE_CURSOR | BO_USE_SCANOUT);
+ drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata,
+ BO_USE_CURSOR | BO_USE_SCANOUT);
- i915_drv->gen = get_gen(device_id);
+ flags &= ~BO_USE_SW_WRITE_OFTEN;
+ flags &= ~BO_USE_SW_READ_OFTEN;
+ flags &= ~BO_USE_LINEAR;
- drv->priv = i915_drv;
+ metadata.tiling = I915_TILING_X;
+ metadata.priority = 2;
- return 0;
-}
+ ret = drv_add_combinations(drv, tileable_formats,
+ ARRAY_SIZE(tileable_formats), &metadata,
+ flags);
+ if (ret)
+ return ret;
-static void i915_close(struct driver *drv)
-{
- free(drv->priv);
- drv->priv = NULL;
+ metadata.tiling = I915_TILING_Y;
+ metadata.priority = 3;
+
+ ret = drv_add_combinations(drv, tileable_formats,
+ ARRAY_SIZE(tileable_formats), &metadata,
+ flags);
+ if (ret)
+ return ret;
+
+ items = drv_query_kms(drv, &num_items);
+ if (!items || !num_items)
+ return 0;
+
+ for (i = 0; i < num_items; i++) {
+ ret = i915_add_kms_item(drv, &items[i]);
+ if (ret) {
+ free(items);
+ return ret;
+ }
+ }
+
+ free(items);
+ return 0;
}
static void i915_align_dimensions(struct driver *drv, uint32_t tiling_mode,
uint32_t *width, uint32_t *height, int bpp)
{
- struct i915_device *i915_drv = (struct i915_device *)drv->priv;
+ struct i915_device *i915_dev = (struct i915_device *)drv->priv;
uint32_t width_alignment = 4, height_alignment = 4;
- switch(tiling_mode) {
- default:
- case I915_TILING_NONE:
- width_alignment = 64 / bpp;
- break;
+ switch (tiling_mode) {
+ default:
+ case I915_TILING_NONE:
+ width_alignment = 64 / bpp;
+ break;
+
+ case I915_TILING_X:
+ width_alignment = 512 / bpp;
+ height_alignment = 8;
+ break;
- case I915_TILING_X:
+ case I915_TILING_Y:
+ if (i915_dev->gen == 3) {
width_alignment = 512 / bpp;
height_alignment = 8;
- break;
-
- case I915_TILING_Y:
- if (i915_drv->gen == 3) {
- width_alignment = 512 / bpp;
- height_alignment = 8;
- } else {
- width_alignment = 128 / bpp;
- height_alignment = 32;
- }
- break;
+ } else {
+ width_alignment = 128 / bpp;
+ height_alignment = 32;
+ }
+ break;
}
- if (i915_drv->gen > 3) {
+ if (i915_dev->gen > 3) {
*width = ALIGN(*width, width_alignment);
*height = ALIGN(*height, height_alignment);
} else {
static int i915_verify_dimensions(struct driver *drv, uint32_t stride,
uint32_t height)
{
- struct i915_device *i915_drv = (struct i915_device *)drv->priv;
- if (i915_drv->gen <= 3 && stride > 8192)
+ struct i915_device *i915_dev = (struct i915_device *)drv->priv;
+ if (i915_dev->gen <= 3 && stride > 8192)
return 0;
return 1;
}
+static int i915_init(struct driver *drv)
+{
+ struct i915_device *i915_dev;
+ drm_i915_getparam_t get_param;
+ int device_id;
+ int ret;
+
+ i915_dev = calloc(1, sizeof(*i915_dev));
+ if (!i915_dev)
+ return -1;
+
+ memset(&get_param, 0, sizeof(get_param));
+ get_param.param = I915_PARAM_CHIPSET_ID;
+ get_param.value = &device_id;
+ ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
+ if (ret) {
+ fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
+ free(i915_dev);
+ return -EINVAL;
+ }
+
+ i915_dev->gen = get_gen(device_id);
+ i915_dev->count = 0;
+
+ i915_dev->mgr = drm_intel_bufmgr_gem_init(drv->fd, 16 * 1024);
+ if (!i915_dev->mgr) {
+ fprintf(stderr, "drv: drm_intel_bufmgr_gem_init failed\n");
+ free(i915_dev);
+ return -EINVAL;
+ }
+
+ drv->priv = i915_dev;
+
+ return i915_add_combinations(drv);
+}
+
+static void i915_close(struct driver *drv)
+{
+ struct i915_device *i915_dev = drv->priv;
+ drm_intel_bufmgr_destroy(i915_dev->mgr);
+ free(i915_dev);
+ drv->priv = NULL;
+}
+
static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height,
uint32_t format, uint32_t flags)
{
- struct driver *drv = bo->drv;
- int bpp = drv_stride_from_format(format, 1, 0);
- struct drm_i915_gem_create gem_create;
- struct drm_i915_gem_set_tiling gem_set_tiling;
- uint32_t tiling_mode = I915_TILING_NONE;
- size_t size, plane;
int ret;
+ size_t plane;
+ char name[20];
+ uint32_t tiling_mode;
+ struct i915_bo *i915_bo;
- if (flags & (DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
- DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN))
+ int bpp = drv_stride_from_format(format, 1, 0);
+ struct i915_device *i915_dev = (struct i915_device *)bo->drv->priv;
+
+ if (flags & (BO_USE_CURSOR | BO_USE_LINEAR |
+ BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
tiling_mode = I915_TILING_NONE;
- else if (flags & DRV_BO_USE_SCANOUT)
+ else if (flags & BO_USE_SCANOUT)
tiling_mode = I915_TILING_X;
- else if (flags & (DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_SW_READ_RARELY |
- DRV_BO_USE_HW_2D | DRV_BO_USE_SW_WRITE_RARELY))
+ else
tiling_mode = I915_TILING_Y;
- i915_align_dimensions(drv, tiling_mode, &width, &height, bpp);
+ i915_align_dimensions(bo->drv, tiling_mode, &width, &height, bpp);
+ drv_bo_from_format(bo, width, height, format);
- switch (format) {
- case DRV_FORMAT_YVU420:
- bo->strides[0] = drv_stride_from_format(format, width, 0);
- bo->strides[1] = bo->strides[2] = drv_stride_from_format(format, width, 1);
- bo->sizes[0] = height * bo->strides[0];
- bo->sizes[1] = bo->sizes[2] = (height / 2) * bo->strides[1];
- bo->offsets[0] = 0;
- bo->offsets[1] = bo->sizes[0];
- bo->offsets[2] = bo->offsets[1] + bo->sizes[1];
- break;
- default:
- bo->strides[0] = drv_stride_from_format(format, width, 0);
- bo->sizes[0] = height * bo->strides[0];
- bo->offsets[0] = 0;
+ if (!i915_verify_dimensions(bo->drv, bo->strides[0], height))
+ return -EINVAL;
+
+ snprintf(name, sizeof(name), "i915-buffer-%u", i915_dev->count);
+ i915_dev->count++;
+
+ i915_bo = calloc(1, sizeof(*i915_bo));
+ if (!i915_bo)
+ return -ENOMEM;
+
+ bo->priv = i915_bo;
+
+ i915_bo->ibos[0] = drm_intel_bo_alloc(i915_dev->mgr, name,
+ bo->total_size, 0);
+ if (!i915_bo->ibos[0]) {
+ fprintf(stderr, "drv: drm_intel_bo_alloc failed");
+ free(i915_bo);
+ bo->priv = NULL;
+ return -ENOMEM;
}
- if (!i915_verify_dimensions(drv, bo->strides[0], height))
- return EINVAL;
+ for (plane = 0; plane < bo->num_planes; plane++) {
+ if (plane > 0)
+ drm_intel_bo_reference(i915_bo->ibos[0]);
- size = bo->offsets[bo->num_planes - 1] + bo->sizes[bo->num_planes - 1];
+ bo->handles[plane].u32 = i915_bo->ibos[0]->handle;
+ i915_bo->ibos[plane] = i915_bo->ibos[0];
+ }
- memset(&gem_create, 0, sizeof(gem_create));
- gem_create.size = size;
+ bo->tiling = tiling_mode;
- ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
- if (ret) {
- fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed "
- "(size=%zu)\n", size);
- return ret;
+ ret = drm_intel_bo_set_tiling(i915_bo->ibos[0], &bo->tiling,
+ bo->strides[0]);
+
+ if (ret || bo->tiling != tiling_mode) {
+ fprintf(stderr, "drv: drm_intel_gem_bo_set_tiling failed "
+ "errno=%x, stride=%x\n", errno, bo->strides[0]);
+ /* Calls i915 bo destroy. */
+ bo->drv->backend->bo_destroy(bo);
+ return -errno;
}
+ return 0;
+}
+
+static int i915_bo_destroy(struct bo *bo)
+{
+ size_t plane;
+ struct i915_bo *i915_bo = bo->priv;
+
for (plane = 0; plane < bo->num_planes; plane++)
- bo->handles[plane].u32 = gem_create.handle;
-
- memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
- do {
- gem_set_tiling.handle = bo->handles[0].u32;
- gem_set_tiling.tiling_mode = tiling_mode;
- gem_set_tiling.stride = bo->strides[0];
- ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GEM_SET_TILING,
- &gem_set_tiling);
- } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
-
- if (ret == -1) {
- struct drm_gem_close gem_close;
- gem_close.handle = bo->handles[0].u32;
- fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed "
- "errno=%x (handle=%x, tiling=%x, stride=%x)\n",
- errno,
- gem_set_tiling.handle,
- gem_set_tiling.tiling_mode,
- gem_set_tiling.stride);
- drmIoctl(drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
- return -errno;
+ drm_intel_bo_unreference(i915_bo->ibos[plane]);
+
+ free(i915_bo);
+ bo->priv = NULL;
+
+ return 0;
+}
+
+static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
+{
+ size_t plane;
+ uint32_t swizzling;
+ struct i915_bo *i915_bo;
+ struct i915_device *i915_dev = bo->drv->priv;
+
+ i915_bo = calloc(1, sizeof(*i915_bo));
+ if (!i915_bo)
+ return -ENOMEM;
+
+ bo->priv = i915_bo;
+
+ /*
+ * When self-importing, libdrm_intel increments the reference count
+ * on the drm_intel_bo. It also returns the same drm_intel_bo per GEM
+ * handle. Thus, we don't need to increase the reference count
+ * (i.e, drv_increment_reference_count) when importing with this
+ * backend.
+ */
+ for (plane = 0; plane < bo->num_planes; plane++) {
+
+ i915_bo->ibos[plane] = drm_intel_bo_gem_create_from_prime(i915_dev->mgr,
+ data->fds[plane], data->sizes[plane]);
+
+ if (!i915_bo->ibos[plane]) {
+ /*
+ * Need to call GEM close on planes that were opened,
+ * if any. Adjust the num_planes variable to be the
+ * plane that failed, so GEM close will be called on
+ * planes before that plane.
+ */
+ bo->num_planes = plane;
+ i915_bo_destroy(bo);
+ fprintf(stderr, "drv: i915: failed to import failed");
+ return -EINVAL;
+ }
+
+ bo->handles[plane].u32 = i915_bo->ibos[plane]->handle;
+ }
+
+ if (drm_intel_bo_get_tiling(i915_bo->ibos[0], &bo->tiling,
+ &swizzling)) {
+ fprintf(stderr, "drv: drm_intel_bo_get_tiling failed");
+ i915_bo_destroy(bo);
+ return -EINVAL;
}
return 0;
}
-static void *i915_bo_map(struct bo *bo)
+static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
{
int ret;
- struct drm_i915_gem_mmap_gtt gem_map;
+ struct i915_bo *i915_bo = bo->priv;
- memset(&gem_map, 0, sizeof(gem_map));
- gem_map.handle = bo->handles[0].u32;
+ if (bo->tiling == I915_TILING_NONE)
+ /* TODO(gsingh): use bo_map flags to determine if we should
+ * enable writing.
+ */
+ ret = drm_intel_bo_map(i915_bo->ibos[0], 1);
+ else
+ ret = drm_intel_gem_bo_map_gtt(i915_bo->ibos[0]);
- ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
if (ret) {
- fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
+ fprintf(stderr, "drv: i915_bo_map failed.");
return MAP_FAILED;
}
- return mmap(0, bo->sizes[0], PROT_READ | PROT_WRITE, MAP_SHARED,
- bo->drv->fd, gem_map.offset);
+ return i915_bo->ibos[0]->virtual;
}
-drv_format_t i915_resolve_format(drv_format_t format)
+static int i915_bo_unmap(struct bo *bo, struct map_info *data)
+{
+ int ret;
+ struct i915_bo *i915_bo = bo->priv;
+
+ if (bo->tiling == I915_TILING_NONE)
+ ret = drm_intel_bo_unmap(i915_bo->ibos[0]);
+ else
+ ret = drm_intel_gem_bo_unmap_gtt(i915_bo->ibos[0]);
+
+ return ret;
+}
+
+static uint32_t i915_resolve_format(uint32_t format)
{
switch (format) {
- case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
- /*HACK: See b/28671744 */
- return DRV_FORMAT_XBGR8888;
- case DRV_FORMAT_FLEX_YCbCr_420_888:
- return DRV_FORMAT_YVU420;
- default:
- return format;
+ case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
+ /*HACK: See b/28671744 */
+ return DRM_FORMAT_XBGR8888;
+ case DRM_FORMAT_FLEX_YCbCr_420_888:
+ return DRM_FORMAT_YVU420;
+ default:
+ return format;
}
}
-const struct backend backend_i915 =
+struct backend backend_i915 =
{
.name = "i915",
.init = i915_init,
.close = i915_close,
.bo_create = i915_bo_create,
- .bo_destroy = drv_gem_bo_destroy,
+ .bo_destroy = i915_bo_destroy,
+ .bo_import = i915_bo_import,
.bo_map = i915_bo_map,
+ .bo_unmap = i915_bo_unmap,
.resolve_format = i915_resolve_format,
- .format_list = {
- {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
- DRV_BO_USE_SW_WRITE_OFTEN},
- {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
- DRV_BO_USE_SW_WRITE_OFTEN},
- {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_XRGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_ARGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_RGB565, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_UYVY, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_UYVY, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
- DRV_BO_USE_SW_WRITE_OFTEN},
- {DRV_FORMAT_YUYV, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
- DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
- DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
- {DRV_FORMAT_YUYV, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
- DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
- DRV_BO_USE_SW_WRITE_OFTEN},
- {DRV_FORMAT_R8, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
- DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
- {DRV_FORMAT_GR88, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
- DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
- {DRV_FORMAT_YVU420, DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
- DRV_BO_USE_SW_WRITE_OFTEN},
- }
};
#endif