* Older hardware can't scanout Y-tiled formats. Newer devices can, and
* report this functionality via format modifiers.
*/
- for (i = 0; i < drv->backend->combos.size; i++) {
- combo = &drv->backend->combos.data[i];
+ for (i = 0; i < drv->combos.size; i++) {
+ combo = &drv->combos.data[i];
if (combo->format != item->format)
continue;
/* IPU3 camera ISP supports only NV12 output. */
drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
- BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE);
+ BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
/*
* R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
* from camera.
*/
drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
- BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE);
+ BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
+ render_flags &= ~BO_USE_RENDERSCRIPT;
render_flags &= ~BO_USE_SW_WRITE_OFTEN;
render_flags &= ~BO_USE_SW_READ_OFTEN;
render_flags &= ~BO_USE_LINEAR;
+ texture_flags &= ~BO_USE_RENDERSCRIPT;
texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
texture_flags &= ~BO_USE_SW_READ_OFTEN;
texture_flags &= ~BO_USE_LINEAR;
break;
}
+ /*
+ * The alignment calculated above is based on the full size luma plane and to have chroma
+ * planes properly aligned with subsampled formats, we need to multiply luma alignment by
+ * subsampling factor.
+ */
+ switch (bo->format) {
+ case DRM_FORMAT_YVU420_ANDROID:
+ case DRM_FORMAT_YVU420:
+ horizontal_alignment *= 2;
+ /* Fall through */
+ case DRM_FORMAT_NV12:
+ vertical_alignment *= 2;
+ break;
+ }
+
+ /*
+ * For multi-planar formats we must be aligned to 16
+ */
+ if (bo->num_planes > 1)
+ vertical_alignment = MAX(vertical_alignment, 16);
+
*aligned_height = ALIGN(bo->height, vertical_alignment);
if (i915->gen > 3) {
*stride = ALIGN(*stride, horizontal_alignment);
return ret;
/*
- * Align the Y plane to 128 bytes so the chroma planes would be aligned
- * to 64 byte boundaries. This is an Intel HW requirement.
+ * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep
+ * total size as with aligned height to ensure enough padding space after each plane to
+ * satisfy GPU alignment requirements.
+ *
+ * We do it by first calling drv_bo_from_format() with aligned height and
+ * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates
+ * and then calling it again with requested parameters.
+ *
+ * This relies on the fact that i965 driver uses separate surfaces for each plane and
+ * contents of padding bytes is not affected, as it is only used to satisfy GPU cache
+ * requests.
+ *
+ * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside
+ * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8.
*/
- if (format == DRM_FORMAT_YVU420)
- stride = ALIGN(stride, 128);
+ if (format == DRM_FORMAT_YVU420_ANDROID) {
+ uint32_t unaligned_height = bo->height;
+ size_t total_size;
+
+ drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420);
+ total_size = bo->total_size;
+ drv_bo_from_format(bo, stride, unaligned_height, format);
+ bo->total_size = total_size;
+ } else {
+ drv_bo_from_format(bo, stride, height, format);
+ }
/*
- * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned.
+ * Quoting Mesa ISL library:
+ *
+ * - For linear surfaces, additional padding of 64 bytes is required at
+ * the bottom of the surface. This is in addition to the padding
+ * required above.
*/
- if (format == DRM_FORMAT_YVU420_ANDROID)
- height = bo->height;
-
- drv_bo_from_format(bo, stride, height, format);
+ if (bo->tiling == I915_TILING_NONE)
+ bo->total_size += 64;
memset(&gem_create, 0, sizeof(gem_create));
gem_create.size = bo->total_size;
return 0;
}
-static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
+static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int prot)
{
int ret;
void *addr;
struct drm_i915_gem_mmap gem_map;
memset(&gem_map, 0, sizeof(gem_map));
+ if ((bo->flags & BO_USE_SCANOUT) && !(bo->flags & BO_USE_RENDERSCRIPT))
+ gem_map.flags = I915_MMAP_WC;
+
gem_map.handle = bo->handles[0].u32;
gem_map.offset = 0;
gem_map.size = bo->total_size;
return MAP_FAILED;
}
- addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
- gem_map.offset);
-
+ addr = mmap(0, bo->total_size, prot, MAP_SHARED, bo->drv->fd, gem_map.offset);
set_domain.read_domains = I915_GEM_DOMAIN_GTT;
set_domain.write_domain = I915_GEM_DOMAIN_GTT;
}
return addr;
}
-static int i915_bo_unmap(struct bo *bo, struct map_info *data)
+static int i915_bo_flush(struct bo *bo, struct map_info *data)
{
struct i915_device *i915 = bo->drv->priv;
if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
i915_clflush(data->addr, data->length);
- return munmap(data->addr, data->length);
+ return 0;
}
static uint32_t i915_resolve_format(uint32_t format, uint64_t usage)
switch (format) {
case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
/* KBL camera subsystem requires NV12. */
- if (usage & (BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE))
+ if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
return DRM_FORMAT_NV12;
/*HACK: See b/28671744 */
return DRM_FORMAT_XBGR8888;
case DRM_FORMAT_FLEX_YCbCr_420_888:
/* KBL camera subsystem requires NV12. */
- if (usage & (BO_USE_HW_CAMERA_READ | BO_USE_HW_CAMERA_WRITE))
+ if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
return DRM_FORMAT_NV12;
return DRM_FORMAT_YVU420;
default:
.bo_destroy = drv_gem_bo_destroy,
.bo_import = i915_bo_import,
.bo_map = i915_bo_map,
- .bo_unmap = i915_bo_unmap,
+ .bo_unmap = drv_bo_munmap,
+ .bo_flush = i915_bo_flush,
.resolve_format = i915_resolve_format,
};
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