/*
* (C) Copyright IBM Corporation 2006
+ * Copyright 2009 Red Hat, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
/**
* \file pciaccess.h
- *
+ *
* \author Ian Romanick <idr@us.ibm.com>
*/
#if __GNUC__ >= 3
#define __deprecated __attribute__((deprecated))
#else
-#define __deprecated
+#define __deprecated
#endif
typedef uint64_t pciaddr_t;
struct pci_device *pci_device_find_by_slot(uint32_t domain, uint32_t bus,
uint32_t dev, uint32_t func);
+struct pci_device *pci_device_get_parent_bridge(struct pci_device *dev);
+
void pci_get_strings(const struct pci_id_match *m,
const char **device_name, const char **vendor_name,
const char **subdevice_name, const char **subvendor_name);
struct pci_id_match {
/**
* \name Device / vendor matching controls
- *
+ *
* Control the search based on the device, vendor, subdevice, or subvendor
* IDs. Setting any of these fields to \c PCI_MATCH_ANY will cause the
* field to not be used in the comparison.
/**
* \name Device class matching controls
- *
+ *
*/
/*@{*/
uint32_t device_class;
* This address is really only useful to other devices in the same
* domain. It's probably \b not the address applications will ever
* use.
- *
+ *
* \warning
* Most (all?) platform back-ends leave this field unset.
*/
/**
* Base physical address of the region from the CPU's point of view.
- *
+ *
* This address is typically passed to \c pci_device_map_range to create
* a mapping of the region to the CPU's virtual address space.
*/
uint8_t card_bus;
uint8_t subordinate_bus;
uint8_t cardbus_latency_timer;
-
+
uint16_t secondary_status;
uint16_t bridge_control;
/* return the current device count + resource decodes for the device */
int pci_device_vgaarb_get_info (struct pci_device *dev, int *vga_count, int *rsrc_decodes);
+/*
+ * I/O space access.
+ */
+
+struct pci_io_handle;
+
+struct pci_io_handle *pci_device_open_io(struct pci_device *dev, pciaddr_t base,
+ pciaddr_t size);
+struct pci_io_handle *pci_legacy_open_io(struct pci_device *dev, pciaddr_t base,
+ pciaddr_t size);
+void pci_device_close_io(struct pci_device *dev, struct pci_io_handle *handle);
+uint32_t pci_io_read32(struct pci_io_handle *handle, uint32_t reg);
+uint16_t pci_io_read16(struct pci_io_handle *handle, uint32_t reg);
+uint8_t pci_io_read8(struct pci_io_handle *handle, uint32_t reg);
+void pci_io_write32(struct pci_io_handle *handle, uint32_t reg, uint32_t data);
+void pci_io_write16(struct pci_io_handle *handle, uint32_t reg, uint16_t data);
+void pci_io_write8(struct pci_io_handle *handle, uint32_t reg, uint8_t data);
+
+/*
+ * Legacy memory access
+ */
+
+int pci_device_map_legacy(struct pci_device *dev, pciaddr_t base,
+ pciaddr_t size, unsigned map_flags, void **addr);
+int pci_device_unmap_legacy(struct pci_device *dev, void *addr, pciaddr_t size);
+
#endif /* PCIACCESS_H */