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android: intel: disable drm_intel_get_aperture_sizes
[android-x86/external-libdrm.git] / intel / intel_bufmgr.c
index 6181773..e0297dd 100644 (file)
 #include <errno.h>
 #include <drm.h>
 #include <i915_drm.h>
+#ifndef ANDROID
+#include <pciaccess.h>
+#endif
 #include "intel_bufmgr.h"
 #include "intel_bufmgr_priv.h"
+#include "xf86drm.h"
 
 /** @file intel_bufmgr.c
  *
@@ -94,19 +98,7 @@ int
 drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
                     unsigned long size, const void *data)
 {
-       int ret;
-
-       if (bo->bufmgr->bo_subdata)
-               return bo->bufmgr->bo_subdata(bo, offset, size, data);
-       if (size == 0 || data == NULL)
-               return 0;
-
-       ret = drm_intel_bo_map(bo, 1);
-       if (ret)
-               return ret;
-       memcpy((unsigned char *)bo->virtual + offset, data, size);
-       drm_intel_bo_unmap(bo);
-       return 0;
+       return bo->bufmgr->bo_subdata(bo, offset, size, data);
 }
 
 int
@@ -114,7 +106,7 @@ drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
                         unsigned long size, void *data)
 {
        int ret;
-       if (bo->bufmgr->bo_subdata)
+       if (bo->bufmgr->bo_get_subdata)
                return bo->bufmgr->bo_get_subdata(bo, offset, size, data);
 
        if (size == 0 || data == NULL)
@@ -145,6 +137,26 @@ drm_intel_bo_exec(drm_intel_bo *bo, int used,
        return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
 }
 
+int
+drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+               drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+               unsigned int rings)
+{
+       if (bo->bufmgr->bo_mrb_exec)
+               return bo->bufmgr->bo_mrb_exec(bo, used,
+                                       cliprects, num_cliprects, DR4,
+                                       rings);
+
+       switch (rings) {
+       case I915_EXEC_DEFAULT:
+       case I915_EXEC_RENDER:
+               return bo->bufmgr->bo_exec(bo, used,
+                                          cliprects, num_cliprects, DR4);
+       default:
+               return -ENODEV;
+       }
+}
+
 void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
 {
        bufmgr->debug = enable_debug;
@@ -162,7 +174,13 @@ int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name)
 
        return -ENODEV;
 }
+int drm_intel_bo_prime(drm_intel_bo *bo, uint32_t * name)
+{
+       if (bo->bufmgr->bo_prime)
+               return bo->bufmgr->bo_prime(bo, name);
 
+       return -ENODEV;
+}
 int
 drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
                        drm_intel_bo *target_bo, uint32_t target_offset,
@@ -173,6 +191,18 @@ drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
                                         read_domains, write_domain);
 }
 
+/* For fence registers, not GL fences */
+int
+drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
+                             drm_intel_bo *target_bo, uint32_t target_offset,
+                             uint32_t read_domains, uint32_t write_domain)
+{
+       return bo->bufmgr->bo_emit_reloc_fence(bo, offset,
+                                              target_bo, target_offset,
+                                              read_domains, write_domain);
+}
+
+
 int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
 {
        if (bo->bufmgr->bo_pin)
@@ -217,6 +247,13 @@ int drm_intel_bo_disable_reuse(drm_intel_bo *bo)
        return 0;
 }
 
+int drm_intel_bo_is_reusable(drm_intel_bo *bo)
+{
+       if (bo->bufmgr->bo_is_reusable)
+               return bo->bufmgr->bo_is_reusable(bo);
+       return 0;
+}
+
 int drm_intel_bo_busy(drm_intel_bo *bo)
 {
        if (bo->bufmgr->bo_busy)
@@ -242,3 +279,53 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id)
                return bufmgr->get_pipe_from_crtc_id(bufmgr, crtc_id);
        return -1;
 }
+
+#ifndef ANDROID
+static size_t
+drm_intel_probe_agp_aperture_size(int fd)
+{
+       struct pci_device *pci_dev;
+       size_t size = 0;
+       int ret;
+
+       ret = pci_system_init();
+       if (ret)
+               goto err;
+
+       /* XXX handle multiple adaptors? */
+       pci_dev = pci_device_find_by_slot(0, 0, 2, 0);
+       if (pci_dev == NULL)
+               goto err;
+
+       ret = pci_device_probe(pci_dev);
+       if (ret)
+               goto err;
+
+       size = pci_dev->regions[2].size;
+err:
+       pci_system_cleanup ();
+       return size;
+}
+
+int drm_intel_get_aperture_sizes(int fd,
+                                size_t *mappable,
+                                size_t *total)
+{
+
+       struct drm_i915_gem_get_aperture aperture;
+       int ret;
+
+       ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
+       if (ret)
+               return ret;
+
+       *mappable = 0;
+       /* XXX add a query for the kernel value? */
+       if (*mappable == 0)
+               *mappable = drm_intel_probe_agp_aperture_size(fd);
+       if (*mappable == 0)
+               *mappable = 64 * 1024 * 1024; /* minimum possible value */
+       *total = aperture.aper_size;
+       return 0;
+}
+#endif