intel: Add initial support for Sandybridge, and clean up the #defines.

[android-x86/external-libdrm.git] / intel / intel_bufmgr_gem.c

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 571ab5c..5512010 100644 (file)
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -210,11 +210,11 @@ drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size,
                return size;
 
        /* 965+ just need multiples of page size for tiling */
-       if (IS_I965G(bufmgr_gem))
+       if (!IS_GEN2(bufmgr_gem) && !IS_GEN3(bufmgr_gem))
                return ROUND_UP_TO(size, 4096);
 
        /* Older chips need powers of two, of at least 512k or 1M */
-       if (IS_I9XX(bufmgr_gem)) {
+       if (!IS_GEN2(bufmgr_gem)) {
                min_size = 1024*1024;
                max_size = 128*1024*1024;
        } else {
@@ -249,7 +249,7 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
                return ROUND_UP_TO(pitch, tile_width);
 
        /* 965 is flexible */
-       if (IS_I965G(bufmgr_gem))
+       if (!IS_GEN2(bufmgr_gem) && !IS_GEN3(bufmgr_gem))
                return ROUND_UP_TO(pitch, tile_width);
 
        /* Pre-965 needs power of two tile width */
@@ -382,7 +382,8 @@ drm_intel_bo_gem_set_in_aperture_size(drm_intel_bufmgr_gem *bufmgr_gem,
         * aperture. Optimal packing is for wimps.
         */
        size = bo_gem->bo.size;
-       if (!IS_I965G(bufmgr_gem) && bo_gem->tiling_mode != I915_TILING_NONE)
+       if ((IS_GEN2(bufmgr_gem) || IS_GEN3(bufmgr_gem))
+           && bo_gem->tiling_mode != I915_TILING_NONE)
                size *= 2;
 
        bo_gem->reloc_tree_size = size;
@@ -950,6 +951,7 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
                                           MAP_SHARED, bufmgr_gem->fd,
                                           mmap_arg.offset);
                if (bo_gem->gtt_virtual == MAP_FAILED) {
+                       bo_gem->gtt_virtual = NULL;
                        ret = -errno;
                        fprintf(stderr,
                                "%s:%d: Error mapping buffer %d (%s): %s .\n",
@@ -1201,23 +1203,17 @@ drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
        drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
        drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo;
 
-       pthread_mutex_lock(&bufmgr_gem->lock);
-       if (bo_gem->has_error) {
-               pthread_mutex_unlock(&bufmgr_gem->lock);
+       if (bo_gem->has_error)
                return -ENOMEM;
-       }
 
        if (target_bo_gem->has_error) {
                bo_gem->has_error = 1;
-               pthread_mutex_unlock(&bufmgr_gem->lock);
                return -ENOMEM;
        }
 
        /* Create a new relocation list if needed */
-       if (bo_gem->relocs == NULL && drm_intel_setup_reloc_list(bo)) {
-               pthread_mutex_unlock(&bufmgr_gem->lock);
+       if (bo_gem->relocs == NULL && drm_intel_setup_reloc_list(bo))
                return -ENOMEM;
-       }
 
        /* Check overflow */
        assert(bo_gem->reloc_count < bufmgr_gem->max_relocs);
@@ -1249,8 +1245,6 @@ drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
 
        bo_gem->reloc_count++;
 
-       pthread_mutex_unlock(&bufmgr_gem->lock);
-
        return 0;
 }
 
@@ -1430,18 +1424,15 @@ drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
 
        memset(&set_tiling, 0, sizeof(set_tiling));
        set_tiling.handle = bo_gem->gem_handle;
-       set_tiling.tiling_mode = *tiling_mode;
-       set_tiling.stride = stride;
 
        do {
+               set_tiling.tiling_mode = *tiling_mode;
+               set_tiling.stride = stride;
+
                ret = ioctl(bufmgr_gem->fd,
                            DRM_IOCTL_I915_GEM_SET_TILING,
                            &set_tiling);
        } while (ret == -1 && errno == EINTR);
-       if (ret != 0) {
-               *tiling_mode = bo_gem->tiling_mode;
-               return -errno;
-       }
        bo_gem->tiling_mode = set_tiling.tiling_mode;
        bo_gem->swizzle_mode = set_tiling.swizzle_mode;
 
@@ -1452,7 +1443,7 @@ drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
        drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem);
 
        *tiling_mode = bo_gem->tiling_mode;
-       return 0;
+       return ret == 0 ? 0 : -errno;
 }
 
 static int
@@ -1734,6 +1725,9 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
        unsigned long size;
 
        bufmgr_gem = calloc(1, sizeof(*bufmgr_gem));
+       if (bufmgr_gem == NULL)
+               return NULL;
+
        bufmgr_gem->fd = fd;
 
        if (pthread_mutex_init(&bufmgr_gem->lock, NULL) != 0) {
@@ -1763,7 +1757,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
                fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value);
        }
 
-       if (!IS_I965G(bufmgr_gem)) {
+       if (IS_GEN2(bufmgr_gem) || IS_GEN3(bufmgr_gem)) {
                gp.param = I915_PARAM_NUM_FENCES_AVAIL;
                gp.value = &bufmgr_gem->available_fences;
                ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
@@ -1773,6 +1767,19 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
                        fprintf(stderr, "param: %d, val: %d\n", gp.param,
                                *gp.value);
                        bufmgr_gem->available_fences = 0;
+               } else {
+                       /* XXX The kernel reports the total number of fences,
+                        * including any that may be pinned.
+                        *
+                        * We presume that there will be at least one pinned
+                        * fence for the scanout buffer, but there may be more
+                        * than one scanout and the user may be manually
+                        * pinning buffers. Let's move to execbuffer2 and
+                        * thereby forget the insanity of using fences...
+                        */
+                       bufmgr_gem->available_fences -= 2;
+                       if (bufmgr_gem->available_fences < 0)
+                               bufmgr_gem->available_fences = 0;
                }
        }