minigbm: fix renderscipt allocation

[android-x86/external-minigbm.git] / mediatek.c

diff --git a/mediatek.c b/mediatek.c
index 0054054..06dbf02 100644 (file)
--- a/mediatek.c
+++ b/mediatek.c
@@ -14,6 +14,18 @@
 
 #include "drv_priv.h"
 #include "helpers.h"
+#include "util.h"
+
+static const uint32_t supported_formats[] = {
+       DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
+       DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_YVU420
+};
+
+static int mediatek_init(struct driver *drv)
+{
+       return drv_add_linear_combinations(drv, supported_formats,
+                                          ARRAY_SIZE(supported_formats));
+}
 
 static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height,
                              uint32_t format, uint32_t flags)
@@ -21,7 +33,13 @@ static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height,
        int ret;
        size_t plane;
        struct drm_mtk_gem_create gem_create;
+       uint32_t bytes_per_pixel = drv_stride_from_format(format, 1, 0);
 
+       /*
+        * Since the ARM L1 cache line size is 64 bytes, align to that as a
+        * performance optimization.
+        */
+       width = ALIGN(width, DIV_ROUND_UP(64, bytes_per_pixel));
        drv_bo_from_format(bo, width, height, format);
 
        memset(&gem_create, 0, sizeof(gem_create));
@@ -60,46 +78,28 @@ static void *mediatek_bo_map(struct bo *bo, struct map_info *data, size_t plane)
                    bo->drv->fd, gem_map.offset);
 }
 
-static drv_format_t mediatek_resolve_format(drv_format_t format)
+static uint32_t mediatek_resolve_format(uint32_t format)
 {
        switch (format) {
-       case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
+       case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
                /*HACK: See b/28671744 */
-               return DRV_FORMAT_XBGR8888;
-       case DRV_FORMAT_FLEX_YCbCr_420_888:
-               return DRV_FORMAT_YVU420;
+               return DRM_FORMAT_XBGR8888;
+       case DRM_FORMAT_FLEX_YCbCr_420_888:
+               return DRM_FORMAT_YVU420;
        default:
                return format;
        }
 }
 
-const struct backend backend_mediatek =
+struct backend backend_mediatek =
 {
        .name = "mediatek",
+       .init = mediatek_init,
        .bo_create = mediatek_bo_create,
        .bo_destroy = drv_gem_bo_destroy,
+       .bo_import = drv_prime_bo_import,
        .bo_map = mediatek_bo_map,
        .resolve_format = mediatek_resolve_format,
-       .format_list = {
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |  DRV_BO_USE_RENDERING
-                                     | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR
-                                     | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING
-                                     | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
-                                     DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
-               {DRV_FORMAT_ABGR8888, DRV_BO_USE_RENDERING
-                                     | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN
-                                     | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
-               {DRV_FORMAT_XBGR8888, DRV_BO_USE_RENDERING
-                                     | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN
-                                     | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
-               {DRV_FORMAT_RGB565,   DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING
-                                     | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
-               {DRV_FORMAT_YVU420,   DRV_BO_USE_RENDERING | DRV_BO_USE_SW_READ_RARELY |
-                                     DRV_BO_USE_SW_WRITE_RARELY},
-       }
 };
 
 #endif