+2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (all_prefixes): New.
+ (ckprefix): Set all_prefixes.
+ (print_insn): Print all_prefixes instead of lock_prefix,
+ repz_prefix, repnz_prefix, addr_prefix and data_prefix.
+
+2009-11-11 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/10924
+ * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
+ (print_insn_arm): Extend %s format control code to check for
+ unpredictable addressing modes. Add support for %S format control
+ code which suppresses this check.
+ (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
+ (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
+ PRE_BIT_SET): New macros.
+ (print_insn_coprocessor): Use the new macros instead of magic
+ constants.
+ (print_arm_address): Likewise.
+ (pirnt_insn_arm): Likewise.
+ (print_insn_thumb32): Likewise.
+
+2009-11-11 Nick Clifton <nickc@redhat.com>
+
+ * po/id.po: Updated Indonesian translation.
+
+2009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
+
+2009-11-06 Sebastian Pop <sebastian.pop@amd.com>
+
+ * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
+ reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
+ B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
+ the xop_table.
+ (get_valid_dis386): Removed unused condition (from cut/n/paste) for
+ XOP instructions.
+
+2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
+ Quentin Neill <quentin.neill@amd.com>
+
+ * opcodes/i386-dis.c (OP_LWPCB_E): New.
+ (OP_LWP_E): New.
+ (OP_LWP_I): New.
+ (USE_XOP_8F_TABLE): New.
+ (XOP_8F_TABLE): New.
+ (REG_XOP_LWPCB): New.
+ (REG_XOP_LWP): New.
+ (XOP_09): New.
+ (XOP_0A): New.
+ (reg_table): Redirect REG_8F to XOP_8F_TABLE.
+ Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
+ (xop_table): New.
+ (get_valid_dis386): Handle USE_XOP_8F_TABLE.
+ Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
+ to access to the vex_table.
+ (OP_LWPCB_E): New.
+ (OP_LWP_E): New.
+ (OP_LWP_I): New.
+ * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
+ (cpu_flags): Add CpuLWP.
+ (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
+ * opcodes/i386-opc.h (CpuLWP): New.
+ (i386_cpu_flags): Add bit cpulwp.
+ (VexLWP): New.
+ (XOP09): New.
+ (XOP0A): New.
+ (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
+ * opcodes/i386-opc.tbl (llwpcb): Added.
+ (lwpval): Added.
+ (lwpins): Added.
+
+2009-11-04 DJ Delorie <dj@redhat.com>
+
+ * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
+ (mvtcp, mvfcp, opecp): Remove.
+ * rx-decode.c: Regenerate.
+ * rx-dis.c (cpen): Remove.
+
+2009-11-03 Doug Evans <dje@sebabeach.org>
+
+ * m32c-desc.c: Regenerate.
+ * mep-desc.c: Regenerate.
+
+2009-11-02 Paul Brook <paul@codesourcery.com>
+
+ * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
+ Add VFPv4 instructions.
+
+2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
+
+ * i386-dis.c (OP_VEX_FMA): Removed.
+ (VexFMA): Removed.
+ (Vex128FMA): Removed.
+ (prefix_table): First source operand of FMA4 insns is decoded
+ with Vex not with VexFMA.
+ (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
+ when vex.w is set. Third source operand is decoded with
+
+2009-10-27 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2009-10-23 Doug Evans <dje@sebabeach.org>
+
+ * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
+ * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
+ * cgen-bitset.c: Update.
+ * fr30-desc.h: Regenerate.
+ * frv-desc.h: Regenerate.
+ * ip2k-desc.h: Regenerate.
+ * iq2000-desc.h: Regenerate.
+ * lm32-desc.h: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-opc.h: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mt-desc.h: Regenerate.
+ * openrisc-desc.h: Regenerate.
+ * xc16x-desc.h: Regenerate.
+ * xstormy16-desc.h: Regenerate.
+
+2009-10-22 DJ Delorie <dj@redhat.com>
+
+ * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
+ * rx-decode.c: Regenerated.
+
+2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/10775
+ * i386-dis.c: Document LB, LS and LV macros.
+ (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
+ with the 64-bit displacement or immediate operand.
+ (putop): Handle LB, LS and LV macros.
+
+2009-10-18 Doug Evans <dje@sebabeach.org>
+
+ * lm32-opinst.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32r-opinst.c: Regenerate.
+ * openrisc-ibld.c: Regenerate.
+ * xc16x-desc.c: Regenerate.
+ * xc16x-desc.h: Regenerate.
+
+2009-10-17 Doug Evans <dje@sebabeach.org>
+
+ * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
+ (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
+ sorted alphabetically.
+ (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
+ stamp-* rules are sorted alphabetically.
+ * Makefile.in: Regenerate.
+
+2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h: Use enum instead of nested macros.
+
+2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c: Simplify enums.
+
+2009-10-15 H.J. Lu <hongjiu.lu@intel.com>
+ Ineiev <ineiev@gmail.com>
+
+ PR binutils/10767
+ * i386-dis.c: Use enum instead of nested macros.
+
+2009-10-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (MAX_BYTEMODE): Removed.
+
+2009-10-14 Tomas Hurka <tom@hukatronic.cz>
+
+ PR 969
+ * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
+
+2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
+ and vex_w_done.
+
+2009-10-07 Michael Eager <eager@eagercon.com>
+
+ * microblaze-dis.c: Add include for microblaze-dis.h,
+ eliminate local extern decls.
+ * microblaze-dis.h: New.
+
+2009-10-06 Nick Clifton <nickc@redhat.com>
+
+ * po/fi.po: Updated Finnish translation.
+
+2009-10-03 Andreas Schwab <schwab@linux-m68k.org>
+
+ * opc2c.c: Include "libiberty.h" and <errno.h>.
+ (orig_filename): Constify.
+ (dump_lines): Fix line number directive.
+ (main): Set orig_filename to basename of input file. Use
+ xstrerror.
+
+ * Makefile.am (rx-dis.lo): Remove explicit dependencies.
+ ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
+ instead of $(EXEEXT).
+ (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
+ $(LINK_FOR_BUILD). Link with libiberty.
+ (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
+ (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
+ * Makefile.in: Regenerated.
+ * rx-decode.c: Regenerated.
+
+2009-10-03 Paul Reed <paulreed@paddedcell.com>
+
+ * arm-dis.c (print_insn): Check symtab_size not *symtab.
+
+2009-10-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
+ * i386-tbl.h: Regenerated.
+
+2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (ppc_opts): Add "476" entry.
+ * ppc-opc.c (PPC476): Define.
+ (powerpc_opcodes): Update mnemonics where required for 476.
+
+2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
+ * ppc-dis.c (ppc_opts): Likewise.
+ Rename "ppca2" to "a2".
+
+2009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+
+ * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
+
+2009-09-29 DJ Delorie <dj@redhat.com>
+
+ * Makefile.am: Add RX files.
+ * configure.in: Add support for RX target.
+ * disassemble.c: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * opc2c.c: New file.
+ * rx-decode.c: New file.
+ * rx-decode.opc: New file.
+ * rx-dis.c: New file.
+
+2009-09-29 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
+ "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
+
+2009-09-25 Michael Eager <eager@eagercon.com>
+
+ * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
+ microblaze_decode_insn): Add declarations.
+ (get_delay_slots_microblaze): Remove.
+
+2009-09-25 Martin Thuresson <martint@google.com>
+
+ Update sources to make arc and arm targets compile cleanly with
+ -Wc++-compat:
+ * arc-dis.c Fix casts.
+ * arc-ext.c: Add casts.
+ * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
+ enum.
+
+2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (opcode_modifiers): Remove Vex256.
+ (set_bitfield): Handle XXX=V.
+
+ * i386-opc.h (Vex): Update comments.
+ (Vex256): Removed.
+ (VexNDS): Updated.
+ (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
+
+ * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
+ * i386-tbl.h: Regenerated.
+
+2009-09-23 Nick Clifton <nickc@redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2009-09-21 Ben Elliston <bje@au.ibm.com>
+ Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (ppc_opts): Add "ppca2" entry.
+ * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
+ eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
+ icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
+ ici mnemonics.
+ (ERAT_T): New operand.
+ (XWC_MASK): New mask.
+ (XOPL2): New macro.
+ (PPCA2): Define.
+
+2009-09-18 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+ * po/vi.po: Updated Vietnamese translation.
+
+2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
+ disp == -disp.
+
+2009-09-14 Nick Clifton <nickc@redhat.com>
+
+ * po/nl.po: Updated Dutch translation.
+
+2009-09-11 Nick Clifton <nickc@redhat.com>
+
+ * po/opcodes.pot: Updated by the Translation project.
+
+2009-09-11 Martin Thuresson <martint@google.com>
+
+ Updated sources to compile cleanly with -Wc++-compat:
+ * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
+ * ldcref.c: Add casts.
+ * ldctor.c: Add casts.
+ * ldexp.c
+ * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
+ * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
+ * ldlang.h (enum statement_enum): Move to top level.
+ * ldmain.c: Add casts.
+ * ldwrite.c: Add casts.
+ * lexsup.c: Add casts. (enum control_enum): Move to top level.
+ * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
+
+2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390-dis.c (print_insn_s390): Avoid 'long long'.
+
+2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
+ (print_insn_s390): Signextend and shift pcrel operands before printing.
+
+2009-09-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
+ VEX_LEN_AE_R_X_M_0 in comments.
+
+2009-09-08 DJ Delorie <dj@redhat.com>
+
+ * mep-opc.c: Regenerate.
+
+2009-09-08 Andreas Schwab <schwab@linux-m68k.org>
+
+ * z8kgen.c (struct op): Replace unused flavor with id.
+ (opt): Remove extra xorb entry.
+ (func): Use id field as fallback.
+ (sub): Return new string, caller changed.
+ (internal): Allocate end marker. Assign unique id before sorting.
+ (gas): Likewise. Fix loop end condition.
+ * z8k-opc.h: Regenerate.
+
+2009-09-08 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
+
+2009-09-07 Alan Modra <amodra@bigpond.net.au>
+
+ * z8kgen.c (func): Fix thinko last patch.
+
+2009-09-07 Alan Modra <amodra@bigpond.net.au>
+
+ * z8kgen.c (func): Stabilize qsort of identically named entries.
+ * z8k-opc.h: Regenerate.
+
+2009-09-07 Tristan Gingold <gingold@adacore.com>
+
+ * po/opcodes.pot: Regenerate.
+
+2009-09-07 Alan Modra <amodra@bigpond.net.au>
+
+ * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
+ * configure: Regenerate.
+ * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
+ (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
+ (i386-gen, ia64-gen, z8kgen): ..here.
+ * Makefile.in: Regenerate.
+
+2009-09-07 Tristan Gingold <gingold@adacore.com>
+
+ * z8k-opc.h: Regenerate.
+
+2009-09-05 Martin Thuresson <martin@mtme.org>
+
+ * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
+ * m88k-dis.c (m88kdis): Rename variable class to in_class.
+ * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
+ Rename argument class to symbol_class.
+
+2009-09-04 Jie Zhang <jie.zhang@analog.com>
+
+ * bfin-dis.c (decode_pseudodbg_assert_0): Change according
+ to the new encoding of DBGA, DBGAH, and DBGAL.
+ (_print_insn_bfin): Likewise.
+
+2009-09-03 Jie Zhang <jie.zhang@analog.com>
+
+ * bfin-dis.c (_print_insn_bfin): Don't declare.
+ (print_insn_bfin): Don't declare.
+ (dregs_pair): Remove.
+ (ignore_bits): Remove.
+ (ccstat): Remove.
+
+2009-09-03 Jie Zhang <jie.zhang@analog.com>
+
+ * bfin-dis.c (IS_DREG): Define.
+ (IS_PREG): Define.
+ (IS_AREG): Define.
+ (IS_GENREG): Define.
+ (IS_DAGREG): Define.
+ (IS_SYSREG): Define.
+ (decode_REGMV_0): Check illegal register move instructions.
+
+2009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
+
+ * Makefile.am (BUILD_LIBINTL): New variable.
+ (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
+ (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
+ (z8kgen$(EXEEXT_FOR_BUILD)): And here.
+ * Makefile.in: Regenerate.
+
+2009-09-01 DJ Delorie <dj@redhat.com>
+
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-opc.c: Regenerate.
+
+2009-09-01 Tristan Gingold <gingold@adacore.com>
+
+ * makefile.vms: Ported to Itanium VMS. Remove useless targets and
+ dependencies. Remove unused FORMAT variable.
+ * configure.com: New file to create build.com DCL script for
+ Itanium VMS or Alpha VMS.
+
+2009-08-29 Martin Thuresson <martin@mtme.org>
+
+ * cris-dis.c (bytes_to_skip): Update code to use new name.
+ * i386-dis.c (putop): Update code to use new name.
+ * i386-gen.c (process_i386_opcodes): Update code to use
+ new name.
+ * i386-opc.h (struct template): Rename struct template to
+ insn_template. Update code accordingly.
+ * i386-tbl.h (i386_optab): Update type to use new name.
+ * ia64-dis.c (print_insn_ia64): Rename variable template
+ to template_val.
+ * tic30-dis.c (struct instruction, get_tic30_instruction):
+ Update code to use new name.
+ * tic54x-dis.c (has_lkaddr, get_insn_size)
+ (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
+ Update code to use new name.
+ * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
+ Update type to new name.
+ * z8kgen.c (internal, gas): Rename variable new to new_op.
+
+2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
+ Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
+ (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
+ CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
+ * Makefile.in: Regenerated.
+
+2009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
+ [INSTALL_LIBBFD]: ... here, ...
+ [INSTALL_LIBBFD]: ... and empty overrides here.
+ [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
+ [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+2009-08-26 Philippe De Muyter <phdm@macqel.be>
+
+ * m68k-dis.c (print_insn_arg): Add movecr register names for
+ coldfire v4e families.
+
+2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (SUBDIRS): Build '.' before 'po'.
+ (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
+ (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
+ (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
+ using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
+ (i386-gen.o): New rule.
+ ($(srcdir)/i386-init.h): Adjust.
+ (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
+ (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
+ (ia64-gen.o): New rule.
+ (ia64_asmtab_deps): New variable.
+ ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
+ (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
+ (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
+ likewise.
+ (s390-opc.tab): Adjust.
+ (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
+ rules.
+ (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
+ * Makefile.in: Regenerate.
+ * z8kgen.c (gas): Avoid '/*' in comment.
+ * z8k-opc.h (func): Regenerate.
+
+2009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
+ from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
+ i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
+ ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
+ msp430-dis.c added.
+ (LIBOPCODES_CFILES): New variable, adding to
+ TARGET_LIBOPCODES_CFILES also non-target library sources.
+ (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
+ files.
+ (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
+ (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
+ [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
+ [INSTALL_LIBBFD] (bfdinclude_DATA): New.
+ [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
+ [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
+ is built shared even if it is not to be installed.
+ (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
+ (install_libopcodes, uninstall_libopcodes): Remove.
+ (AM_CPPFLAGS): Renamed from ...
+ (INCLUDES): ... this.
+ * Makefile.in: Regenerate.
+
+ * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
+ 1.11, foreign, no-dist.
+ (MKDEP, m32c_opc_h): Remove variables.
+ (disassemble.lo): Rewrite using automake-style dependency
+ tracking rules; only list the dependency upon the primary source
+ file, but no included headers.
+ (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
+ (i386-gen.o, ia64-gen.o): Remove dependency statements.
+ (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
+ ensure all dependency fragments are included in the Makefile.
+ (s390-opc.lo): Depend on s390-opc.tab.
+ (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
+ (mkdep section): Remove.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+ * Makefile.am (install-pdf, install-html): Remove.
+ * Makefile.in: Regenerate.
+
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Likewise.
+ * config.in: Likewise.
+ * configure: Likewise.
+
+2009-08-06 Michael Eager <eager@eagercon.com>
+
+ * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
+ CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
+ * Makefile.in: Regenerate.
+ * configure.in: Add bfd_microblaze_arch target.
+ * configure: Regenerate.
+ * disassemble.c: Define ARCH_microblaze, return
+ print_insn_microblaze().
+ * microblaze-dis.c: New MicroBlaze disassembler.
+ * microblaze-opc.h: New MicroBlaze opcode definitions.
+ * microblaze-opcm.h: New MicroBlaze opcode types.
+
+2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.in: Handle bfd_l1om_arch.
+ * disassemble.c (disassembler): Likewise.
+
+ * configure: Regenerated.
+
+ * i386-dis.c (print_insn): Handle bfd_mach_l1om and
+ bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
+
+ * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
+ Add CPU_L1OM_FLAGS.
+ (cpu_flags): Add CpuL1OM.
+ (set_bitfield): Take an argument to set the value field.
+ (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
+ (process_i386_opcode_modifier): Updated.
+ (process_i386_operand_type): Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
+
+ * i386-opc.h (CpuL1OM): New.
+ (CpuXsave): Updated.
+ (i386_cpu_flags): Add cpul1om.
+
+2009-07-24 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
+ frstpm.
+ * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
+ (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
+ (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
+ * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
+ Define.
+ (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
+ and cpufisttp.
+ * i386-opc.tbl: Qualify floating point instructions by their
+ respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
+ and fsincos to be avilable only on 387. Fix fstsw ax to be
+ available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
+ and frstpm.
+ * i386-init.h, i386-tbl.h: Regenerate.
+
+2009-07-20 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
+ offset or indexed based addressing mode 3.
+
+2009-07-14 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
+ patterns.
+ (arm_decode_shift): Catch illegal register based shifts.
+ (print_insn_arm): Properly handle negative register r0
+ post-indexed addressing.
+
+2009-07-10 Doug Kwan <dougkwan@google.com>
+
+ * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
+ lower 32 bits of long types to make hexadecimal output consistent
+ on both 32-bit and 64-bit hosts.
+
+2009-07-10 Alan Modra <amodra@bigpond.net.au>
+
+ * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
+ * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
+ * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
+ * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
+ * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
+ * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
+ * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
+ * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
+ * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
+ * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
+ * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
+ * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
+
+2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
+
+ * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
+
+2009-07-07 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
+ addressing modes.
+
+2009-07-06 DJ Delorie <dj@redhat.com>
+
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+
+2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+
+ * i386-opc.h (CpuFMA4): Add CpuFMA4.
+ (i386_cpu_flags): New.
+ * i386-gen.c: Add CPU_FMA4_FLAGS.
+ * i386-opc.tbl: Add FMA4 instructions.
+ * i386-tbl.h: Regenerate.
+ * i386-init.h: Regenerate.
+ * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
+ (OP_XMM_VexW): Ditto.
+ (OP_EX_VexW): Ditto.
+ (VEXI4_Fixup): Ditto.
+ (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
+ (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
+ (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
+ (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
+ (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
+ (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
+ (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
+ (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
+ (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
+ (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
+ (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
+ (get_vex_imm8): New. handle FMA4.
+ (OP_EX_VexReg): Ditto.
+
+2009-06-30 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (coprocessor): Print the LDC and STC versions of the
+ LFM and SFM instructions as comments,.
+ Improve consistency of formatting for instructions displayed as
+ comments and decimal values displayed with their hexadecimal
+ equivalents.
+ Formatting tidy ups.
+
+2009-06-29 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (enum opcode_sentinels): New: Used to mark the
+ boundary between variaant and generic coprocessor instuctions.
+ (coprocessor): Use it.
+ Fix architecture version of MCRR and MRRC instructions.
+ (arm_opcdes): Fix patterns for STRB and STRH instructions.
+ (print_insn_coprocessor): Check architecture and extension masks.
+ Print a hexadecimal version of any decimal constant that is
+ outside of the range of -16 to +32.
+ (print_arm_address): Add a return value of the offset used in the
+ adress, if it is worth printing a hexadecimal version of it.
+ (print_insn_neon): Print a hexadecimal version of any decimal
+ constant that is outside of the range of -16 to +32.
+ (print_insn_arm): Likewise.
+ (print_insn_thumb16): Likewise.
+ (print_insn_thumb32): Likewise.
+
+ PR 10297
+ * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
+ of an undefined instruction.
+ (arm_opcodes): Use it.
+ (thumb_opcod): Use it.
+ (thumb32_opc): Use it.
+
2009-06-23 DJ Delorie <dj@redhat.com>
* mep-desc.c: Regenerate.
(OP_DREX_FCMP): Delete.
(DREX_*): Delete.
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
-
+
2009-05-22 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
2009-01-28 Chao-ying Fu <fu@mips.com>
- * mips-opc.c (suxc1): Add the flag of FP_D.
+ * mips-opc.c (suxc1): Add the flag of FP_D.
2009-01-20 Alan Modra <amodra@bigpond.net.au>
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
- PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
+ PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
PREFIX_VEX_3896...PREFIX_VEX_389F,
instructions. Add new FMA instructions.
* i386-tbl.h: Regenerated.
-2009-01-02 Matthias Klose <doko@ubuntu.com>
+2009-01-02 Matthias Klose <doko@ubuntu.com>
- * or32-opc.c (or32_print_register, or32_print_immediate,
- disassemble_insn): Don't rely on undefined sprintf behaviour.
+ * or32-opc.c (or32_print_register, or32_print_immediate,
+ disassemble_insn): Don't rely on undefined sprintf behaviour.
For older changes see ChangeLog-2008
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